dynarmic/src/frontend/ir/opcodes.inc

//     opcode name,             return type,    arg1 type,      arg2 type,      arg3 type,      ...

OPCODE(Identity,                T::Opaque,      T::Opaque                                       )
OPCODE(Breakpoint,              T::Void,                                                        )

// ARM Context getters/setters
OPCODE(GetRegister,             T::U32,         T::RegRef                                       )
OPCODE(GetExtendedRegister32,   T::F32,         T::ExtRegRef                                    )
OPCODE(GetExtendedRegister64,   T::F64,         T::ExtRegRef                                    )
OPCODE(SetRegister,             T::Void,        T::RegRef,      T::U32                          )
OPCODE(SetExtendedRegister32,   T::Void,        T::ExtRegRef,   T::F32                          )
OPCODE(SetExtendedRegister64,   T::Void,        T::ExtRegRef,   T::F64                          )
OPCODE(GetNFlag,                T::U1,                                                          )
OPCODE(SetNFlag,                T::Void,        T::U1                                           )
OPCODE(GetZFlag,                T::U1,                                                          )
OPCODE(SetZFlag,                T::Void,        T::U1                                           )
OPCODE(GetCFlag,                T::U1,                                                          )
OPCODE(SetCFlag,                T::Void,        T::U1                                           )
OPCODE(GetVFlag,                T::U1,                                                          )
OPCODE(SetVFlag,                T::Void,        T::U1                                           )
OPCODE(BXWritePC,               T::Void,        T::U32                                          )
OPCODE(CallSupervisor,          T::Void,        T::U32                                          )

// Pseudo-operation, handled specially at final emit
OPCODE(GetCarryFromOp,          T::U1,          T::U32                                          )
OPCODE(GetOverflowFromOp,       T::U1,          T::U32                                          )

// Calculations
OPCODE(Pack2x32To1x64,          T::U64,         T::U32,         T::U32                          )
OPCODE(LeastSignificantWord,    T::U32,         T::U64                                          )
OPCODE(MostSignificantWord,     T::U32,         T::U64                                          )
OPCODE(LeastSignificantHalf,    T::U16,         T::U32                                          )
OPCODE(LeastSignificantByte,    T::U8,          T::U32                                          )
OPCODE(MostSignificantBit,      T::U1,          T::U32                                          )
OPCODE(IsZero,                  T::U1,          T::U32                                          )
OPCODE(IsZero64,                T::U1,          T::U64                                          )
OPCODE(LogicalShiftLeft,        T::U32,         T::U32,         T::U8,          T::U1           )
OPCODE(LogicalShiftRight,       T::U32,         T::U32,         T::U8,          T::U1           )
OPCODE(ArithmeticShiftRight,    T::U32,         T::U32,         T::U8,          T::U1           )
OPCODE(RotateRight,             T::U32,         T::U32,         T::U8,          T::U1           )
OPCODE(RotateRightExtended,     T::U32,         T::U32,         T::U1                           )
OPCODE(AddWithCarry,            T::U32,         T::U32,         T::U32,         T::U1           )
OPCODE(SubWithCarry,            T::U32,         T::U32,         T::U32,         T::U1           )
OPCODE(Add64,                   T::U64,         T::U64,         T::U64                          )
OPCODE(Mul,                     T::U32,         T::U32,         T::U32                          )
OPCODE(Mul64,                   T::U64,         T::U64,         T::U64                          )
OPCODE(And,                     T::U32,         T::U32,         T::U32                          )
OPCODE(Eor,                     T::U32,         T::U32,         T::U32                          )
OPCODE(Or,                      T::U32,         T::U32,         T::U32                          )
OPCODE(Not,                     T::U32,         T::U32                                          )
OPCODE(SignExtendWordToLong,    T::U64,         T::U32                                          )
OPCODE(SignExtendHalfToWord,    T::U32,         T::U16                                          )
OPCODE(SignExtendByteToWord,    T::U32,         T::U8                                           )
OPCODE(ZeroExtendWordToLong,    T::U64,         T::U32                                          )
OPCODE(ZeroExtendHalfToWord,    T::U32,         T::U16                                          )
OPCODE(ZeroExtendByteToWord,    T::U32,         T::U8                                           )
OPCODE(ByteReverseWord,         T::U32,         T::U32                                          )
OPCODE(ByteReverseHalf,         T::U16,         T::U16                                          )
OPCODE(ByteReverseDual,         T::U64,         T::U64                                          )

// Floating-point
OPCODE(FPAdd32,                 T::F32,         T::F32,         T::F32                          )
OPCODE(FPAdd64,                 T::F64,         T::F64,         T::F64                          )

// Memory access
OPCODE(ReadMemory8,             T::U8,          T::U32                                          )
OPCODE(ReadMemory16,            T::U16,         T::U32                                          )
OPCODE(ReadMemory32,            T::U32,         T::U32                                          )
OPCODE(ReadMemory64,            T::U64,         T::U32                                          )
OPCODE(WriteMemory8,            T::Void,        T::U32,         T::U8                           )
OPCODE(WriteMemory16,           T::Void,        T::U32,         T::U16                          )
OPCODE(WriteMemory32,           T::Void,        T::U32,         T::U32                          )
OPCODE(WriteMemory64,           T::Void,        T::U32,         T::U64                          )
First Commit 2016-07-01 14:01:06 +01:00			`// opcode name, return type, arg1 type, arg2 type, arg3 type, ...`

IROpt: Port get/set elimination pass to current IR 2016-08-02 11:51:05 +01:00			`OPCODE(Identity, T::Opaque, T::Opaque )`
IR: Add Breakpoint IR instruction (for debugging purposes, emits a host-breakpoint) 2016-08-05 14:07:27 +01:00			`OPCODE(Breakpoint, T::Void, )`
IROpt: Port get/set elimination pass to current IR 2016-08-02 11:51:05 +01:00
First Commit 2016-07-01 14:01:06 +01:00			`// ARM Context getters/setters`
			`OPCODE(GetRegister, T::U32, T::RegRef )`
VFP: Implement {Get,Set}ExtendedRegister{32,64} 2016-08-05 18:54:19 +01:00			`OPCODE(GetExtendedRegister32, T::F32, T::ExtRegRef )`
			`OPCODE(GetExtendedRegister64, T::F64, T::ExtRegRef )`
First Commit 2016-07-01 14:01:06 +01:00			`OPCODE(SetRegister, T::Void, T::RegRef, T::U32 )`
VFP: Implement {Get,Set}ExtendedRegister{32,64} 2016-08-05 18:54:19 +01:00			`OPCODE(SetExtendedRegister32, T::Void, T::ExtRegRef, T::F32 )`
			`OPCODE(SetExtendedRegister64, T::Void, T::ExtRegRef, T::F64 )`
First Commit 2016-07-01 14:01:06 +01:00			`OPCODE(GetNFlag, T::U1, )`
			`OPCODE(SetNFlag, T::Void, T::U1 )`
			`OPCODE(GetZFlag, T::U1, )`
			`OPCODE(SetZFlag, T::Void, T::U1 )`
			`OPCODE(GetCFlag, T::U1, )`
			`OPCODE(SetCFlag, T::Void, T::U1 )`
			`OPCODE(GetVFlag, T::U1, )`
			`OPCODE(SetVFlag, T::Void, T::U1 )`
IR: Implement IR microinstructions ALUWritePC and LoadWritePC 2016-07-12 10:58:14 +01:00			`OPCODE(BXWritePC, T::Void, T::U32 )`
Implement arm_SVC 2016-07-14 14:04:43 +01:00			`OPCODE(CallSupervisor, T::Void, T::U32 )`
First Commit 2016-07-01 14:01:06 +01:00
			`// Pseudo-operation, handled specially at final emit`
			`OPCODE(GetCarryFromOp, T::U1, T::U32 )`
Implement thumb1_ADD_reg_t1 and thumb1_ADD_reg_t2 2016-07-08 10:09:18 +01:00			`OPCODE(GetOverflowFromOp, T::U1, T::U32 )`
First Commit 2016-07-01 14:01:06 +01:00
			`// Calculations`
Add more IR opcodes for multiply instructions Pack2x32To1x64, LeastSignificantWord, MostSignificantWord, IsZero64, Add64, Mul, Mul64, SignExtendWordToLong, ZeroExtendWordToLong 2016-08-04 22:04:42 +01:00			`OPCODE(Pack2x32To1x64, T::U64, T::U32, T::U32 )`
			`OPCODE(LeastSignificantWord, T::U32, T::U64 )`
			`OPCODE(MostSignificantWord, T::U32, T::U64 )`
Implement thumb1_STR_reg, thumb1_STRH_reg, thumb1_STRB_reg 2016-07-11 23:06:35 +01:00			`OPCODE(LeastSignificantHalf, T::U16, T::U32 )`
First Commit 2016-07-01 14:01:06 +01:00			`OPCODE(LeastSignificantByte, T::U8, T::U32 )`
			`OPCODE(MostSignificantBit, T::U1, T::U32 )`
			`OPCODE(IsZero, T::U1, T::U32 )`
Add more IR opcodes for multiply instructions Pack2x32To1x64, LeastSignificantWord, MostSignificantWord, IsZero64, Add64, Mul, Mul64, SignExtendWordToLong, ZeroExtendWordToLong 2016-08-04 22:04:42 +01:00			`OPCODE(IsZero64, T::U1, T::U64 )`
First Commit 2016-07-01 14:01:06 +01:00			`OPCODE(LogicalShiftLeft, T::U32, T::U32, T::U8, T::U1 )`
			`OPCODE(LogicalShiftRight, T::U32, T::U32, T::U8, T::U1 )`
Reorganisation, Import Skyeye, This is a mess 2016-07-04 10:22:11 +01:00			`OPCODE(ArithmeticShiftRight, T::U32, T::U32, T::U8, T::U1 )`
Implemented thumb1_ROR_reg 2016-07-10 01:18:17 +01:00			`OPCODE(RotateRight, T::U32, T::U32, T::U8, T::U1 )`
Add IR opcode RotateRightExtended to rotate through the carry flag 2016-07-31 19:07:35 +01:00			`OPCODE(RotateRightExtended, T::U32, T::U32, T::U1 )`
Implement thumb1_ADD_reg_t1 and thumb1_ADD_reg_t2 2016-07-08 10:09:18 +01:00			`OPCODE(AddWithCarry, T::U32, T::U32, T::U32, T::U1 )`
Implement thumb1_SUB_reg 2016-07-08 11:49:30 +01:00			`OPCODE(SubWithCarry, T::U32, T::U32, T::U32, T::U1 )`
Add more IR opcodes for multiply instructions Pack2x32To1x64, LeastSignificantWord, MostSignificantWord, IsZero64, Add64, Mul, Mul64, SignExtendWordToLong, ZeroExtendWordToLong 2016-08-04 22:04:42 +01:00			`OPCODE(Add64, T::U64, T::U64, T::U64 )`
			`OPCODE(Mul, T::U32, T::U32, T::U32 )`
			`OPCODE(Mul64, T::U64, T::U64, T::U64 )`
Implement thumb1_AND_reg 2016-07-08 10:43:28 +01:00			`OPCODE(And, T::U32, T::U32, T::U32 )`
Implement thumb1_EOR_reg 2016-07-08 11:14:50 +01:00			`OPCODE(Eor, T::U32, T::U32, T::U32 )`
Implement thumb1_ORR_reg 2016-07-10 02:06:38 +01:00			`OPCODE(Or, T::U32, T::U32, T::U32 )`
Implement thumb1_BIC_reg 2016-07-10 03:44:45 +01:00			`OPCODE(Not, T::U32, T::U32 )`
Add more IR opcodes for multiply instructions Pack2x32To1x64, LeastSignificantWord, MostSignificantWord, IsZero64, Add64, Mul, Mul64, SignExtendWordToLong, ZeroExtendWordToLong 2016-08-04 22:04:42 +01:00			`OPCODE(SignExtendWordToLong, T::U64, T::U32 )`
Implement thumb16_{SXTH,SXTB,UXTH,UXTB,REV,REV16,REVSH} 2016-07-16 19:23:42 +01:00			`OPCODE(SignExtendHalfToWord, T::U32, T::U16 )`
			`OPCODE(SignExtendByteToWord, T::U32, T::U8 )`
Add more IR opcodes for multiply instructions Pack2x32To1x64, LeastSignificantWord, MostSignificantWord, IsZero64, Add64, Mul, Mul64, SignExtendWordToLong, ZeroExtendWordToLong 2016-08-04 22:04:42 +01:00			`OPCODE(ZeroExtendWordToLong, T::U64, T::U32 )`
Implement thumb16_{SXTH,SXTB,UXTH,UXTB,REV,REV16,REVSH} 2016-07-16 19:23:42 +01:00			`OPCODE(ZeroExtendHalfToWord, T::U32, T::U16 )`
			`OPCODE(ZeroExtendByteToWord, T::U32, T::U8 )`
			`OPCODE(ByteReverseWord, T::U32, T::U32 )`
			`OPCODE(ByteReverseHalf, T::U16, T::U16 )`
Implement memory endianness. Implement Thumb SETEND instruction. 2016-07-20 15:34:17 +01:00			`OPCODE(ByteReverseDual, T::U64, T::U64 )`
Implement thumb1_LDR_literal, thumb1_LDR_imm_t1 2016-07-11 22:43:53 +01:00
VFP: Implement VADD.{F32,F64} 2016-08-06 17:21:29 +01:00			`// Floating-point`
			`OPCODE(FPAdd32, T::F32, T::F32, T::F32 )`
			`OPCODE(FPAdd64, T::F64, T::F64, T::F64 )`

Implement thumb1_LDR_literal, thumb1_LDR_imm_t1 2016-07-11 22:43:53 +01:00			`// Memory access`
			`OPCODE(ReadMemory8, T::U8, T::U32 )`
			`OPCODE(ReadMemory16, T::U16, T::U32 )`
			`OPCODE(ReadMemory32, T::U32, T::U32 )`
			`OPCODE(ReadMemory64, T::U64, T::U32 )`
			`OPCODE(WriteMemory8, T::Void, T::U32, T::U8 )`
			`OPCODE(WriteMemory16, T::Void, T::U32, T::U16 )`
			`OPCODE(WriteMemory32, T::Void, T::U32, T::U32 )`
			`OPCODE(WriteMemory64, T::Void, T::U32, T::U64 )`