From 11ae8d1ffaa0b6562b619874bb094b23317bc76b Mon Sep 17 00:00:00 2001 From: Sebastian Valle Date: Sat, 26 Nov 2016 12:58:09 -0500 Subject: [PATCH] Added disassembler support for the ARM parallel add/subtract (modulo arithmetic) instructions. (#50) --- .../disassembler/disassembler_arm.cpp | 48 ++++++++++++++----- 1 file changed, 36 insertions(+), 12 deletions(-) diff --git a/src/frontend/disassembler/disassembler_arm.cpp b/src/frontend/disassembler/disassembler_arm.cpp index 47007559..cf8d07ba 100644 --- a/src/frontend/disassembler/disassembler_arm.cpp +++ b/src/frontend/disassembler/disassembler_arm.cpp @@ -673,18 +673,42 @@ public: } // Parallel Add/Subtract (Modulo arithmetic) instructions - std::string arm_SADD8(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } - std::string arm_SADD16(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } - std::string arm_SASX(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } - std::string arm_SSAX(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } - std::string arm_SSUB8(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } - std::string arm_SSUB16(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } - std::string arm_UADD8(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } - std::string arm_UADD16(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } - std::string arm_UASX(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } - std::string arm_USAX(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } - std::string arm_USUB8(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } - std::string arm_USUB16(Cond cond, Reg n, Reg d, Reg m) { return "ice"; } + std::string arm_SADD8(Cond cond, Reg n, Reg d, Reg m) { + return fmt::format("sadd8{} {}, {}, {}", CondToString(cond), d, n, m); + } + std::string arm_SADD16(Cond cond, Reg n, Reg d, Reg m) { + return fmt::format("sadd16{} {}, {}, {}", CondToString(cond), d, n, m); + } + std::string arm_SASX(Cond cond, Reg n, Reg d, Reg m) { + return fmt::format("sasx{} {}, {}, {}", CondToString(cond), d, n, m); + } + std::string arm_SSAX(Cond cond, Reg n, Reg d, Reg m) { + return fmt::format("ssax{} {}, {}, {}", CondToString(cond), d, n, m); + } + std::string arm_SSUB8(Cond cond, Reg n, Reg d, Reg m) { + return fmt::format("ssub8{} {}, {}, {}", CondToString(cond), d, n, m); + } + std::string arm_SSUB16(Cond cond, Reg n, Reg d, Reg m) { + return fmt::format("ssub16{} {}, {}, {}", CondToString(cond), d, n, m); + } + std::string arm_UADD8(Cond cond, Reg n, Reg d, Reg m) { + return fmt::format("uadd8{} {}, {}, {}", CondToString(cond), d, n, m); + } + std::string arm_UADD16(Cond cond, Reg n, Reg d, Reg m) { + return fmt::format("uadd16{} {}, {}, {}", CondToString(cond), d, n, m); + } + std::string arm_UASX(Cond cond, Reg n, Reg d, Reg m) { + return fmt::format("uasx{} {}, {}, {}", CondToString(cond), d, n, m); + } + std::string arm_USAX(Cond cond, Reg n, Reg d, Reg m) { + return fmt::format("usax{} {}, {}, {}", CondToString(cond), d, n, m); + } + std::string arm_USUB8(Cond cond, Reg n, Reg d, Reg m) { + return fmt::format("usub8{} {}, {}, {}", CondToString(cond), d, n, m); + } + std::string arm_USUB16(Cond cond, Reg n, Reg d, Reg m) { + return fmt::format("usub16{} {}, {}, {}", CondToString(cond), d, n, m); + } // Parallel Add/Subtract (Saturating) instructions std::string arm_QADD8(Cond cond, Reg n, Reg d, Reg m) {