IR: Implement FPMax, FPMin
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4 changed files with 42 additions and 0 deletions
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@ -257,6 +257,22 @@ void EmitX64::EmitFPDiv64(EmitContext& ctx, IR::Inst* inst) {
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FPThreeOp64(code, ctx, inst, &Xbyak::CodeGenerator::divsd);
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FPThreeOp64(code, ctx, inst, &Xbyak::CodeGenerator::divsd);
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}
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}
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void EmitX64::EmitFPMax32(EmitContext& ctx, IR::Inst* inst) {
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FPThreeOp32(code, ctx, inst, &Xbyak::CodeGenerator::maxss);
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}
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void EmitX64::EmitFPMax64(EmitContext& ctx, IR::Inst* inst) {
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FPThreeOp64(code, ctx, inst, &Xbyak::CodeGenerator::maxsd);
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}
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void EmitX64::EmitFPMin32(EmitContext& ctx, IR::Inst* inst) {
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FPThreeOp32(code, ctx, inst, &Xbyak::CodeGenerator::minss);
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}
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void EmitX64::EmitFPMin64(EmitContext& ctx, IR::Inst* inst) {
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FPThreeOp64(code, ctx, inst, &Xbyak::CodeGenerator::minsd);
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}
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void EmitX64::EmitFPMul32(EmitContext& ctx, IR::Inst* inst) {
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void EmitX64::EmitFPMul32(EmitContext& ctx, IR::Inst* inst) {
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FPThreeOp32(code, ctx, inst, &Xbyak::CodeGenerator::mulss);
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FPThreeOp32(code, ctx, inst, &Xbyak::CodeGenerator::mulss);
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}
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}
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@ -1068,6 +1068,26 @@ U32U64 IREmitter::FPDiv(const U32U64& a, const U32U64& b, bool fpscr_controlled)
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}
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}
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}
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}
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U32U64 IREmitter::FPMax(const U32U64& a, const U32U64& b, bool fpscr_controlled) {
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ASSERT(fpscr_controlled);
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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return Inst<U32>(Opcode::FPMax32, a, b);
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} else {
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return Inst<U64>(Opcode::FPMax64, a, b);
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}
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}
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U32U64 IREmitter::FPMin(const U32U64& a, const U32U64& b, bool fpscr_controlled) {
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ASSERT(fpscr_controlled);
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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return Inst<U32>(Opcode::FPMin32, a, b);
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} else {
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return Inst<U64>(Opcode::FPMin64, a, b);
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}
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}
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U32U64 IREmitter::FPMul(const U32U64& a, const U32U64& b, bool fpscr_controlled) {
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U32U64 IREmitter::FPMul(const U32U64& a, const U32U64& b, bool fpscr_controlled) {
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ASSERT(fpscr_controlled);
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ASSERT(fpscr_controlled);
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ASSERT(a.GetType() == b.GetType());
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ASSERT(a.GetType() == b.GetType());
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@ -233,6 +233,8 @@ public:
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U32U64 FPAdd(const U32U64& a, const U32U64& b, bool fpscr_controlled);
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U32U64 FPAdd(const U32U64& a, const U32U64& b, bool fpscr_controlled);
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NZCV FPCompare(const U32U64& a, const U32U64& b, bool exc_on_qnan, bool fpscr_controlled);
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NZCV FPCompare(const U32U64& a, const U32U64& b, bool exc_on_qnan, bool fpscr_controlled);
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U32U64 FPDiv(const U32U64& a, const U32U64& b, bool fpscr_controlled);
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U32U64 FPDiv(const U32U64& a, const U32U64& b, bool fpscr_controlled);
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U32U64 FPMax(const U32U64& a, const U32U64& b, bool fpscr_controlled);
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U32U64 FPMin(const U32U64& a, const U32U64& b, bool fpscr_controlled);
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U32U64 FPMul(const U32U64& a, const U32U64& b, bool fpscr_controlled);
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U32U64 FPMul(const U32U64& a, const U32U64& b, bool fpscr_controlled);
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U32U64 FPNeg(const U32U64& a);
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U32U64 FPNeg(const U32U64& a);
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U32U64 FPSqrt(const U32U64& a);
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U32U64 FPSqrt(const U32U64& a);
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@ -272,6 +272,10 @@ OPCODE(FPCompare32, T::NZCVFlags, T::U32, T::U32,
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OPCODE(FPCompare64, T::NZCVFlags, T::U64, T::U64, T::U1 )
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OPCODE(FPCompare64, T::NZCVFlags, T::U64, T::U64, T::U1 )
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OPCODE(FPDiv32, T::U32, T::U32, T::U32 )
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OPCODE(FPDiv32, T::U32, T::U32, T::U32 )
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OPCODE(FPDiv64, T::U64, T::U64, T::U64 )
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OPCODE(FPDiv64, T::U64, T::U64, T::U64 )
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OPCODE(FPMax32, T::U32, T::U32, T::U32 )
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OPCODE(FPMax64, T::U64, T::U64, T::U64 )
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OPCODE(FPMin32, T::U32, T::U32, T::U32 )
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OPCODE(FPMin64, T::U64, T::U64, T::U64 )
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OPCODE(FPMul32, T::U32, T::U32, T::U32 )
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OPCODE(FPMul32, T::U32, T::U32, T::U32 )
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OPCODE(FPMul64, T::U64, T::U64, T::U64 )
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OPCODE(FPMul64, T::U64, T::U64, T::U64 )
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OPCODE(FPNeg32, T::U32, T::U32 )
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OPCODE(FPNeg32, T::U32, T::U32 )
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