From 394bd57bb64889b904117169bca3c992aa536930 Mon Sep 17 00:00:00 2001 From: MerryMage Date: Tue, 23 Jan 2018 17:45:14 +0000 Subject: [PATCH] microinstruction: bug: Add missing opcodes --- src/frontend/ir/microinstruction.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/frontend/ir/microinstruction.cpp b/src/frontend/ir/microinstruction.cpp index be477012..d6645881 100644 --- a/src/frontend/ir/microinstruction.cpp +++ b/src/frontend/ir/microinstruction.cpp @@ -113,6 +113,8 @@ bool Inst::ReadsFromCPSR() const { case Opcode::A32GetCFlag: case Opcode::A32GetVFlag: case Opcode::A32GetGEFlags: + case Opcode::ConditionalSelect32: + case Opcode::ConditionalSelect64: return true; default: @@ -147,6 +149,8 @@ bool Inst::ReadsFromCoreRegister() const { case Opcode::A32GetExtendedRegister64: case Opcode::A64GetW: case Opcode::A64GetX: + case Opcode::A64GetD: + case Opcode::A64GetQ: case Opcode::A64GetSP: return true; @@ -163,6 +167,8 @@ bool Inst::WritesToCoreRegister() const { case Opcode::A32BXWritePC: case Opcode::A64SetW: case Opcode::A64SetX: + case Opcode::A64SetD: + case Opcode::A64SetQ: case Opcode::A64SetSP: case Opcode::A64SetPC: return true;