From 5297027ebebfa14c401533d912eaceb386f32860 Mon Sep 17 00:00:00 2001 From: MerryMage Date: Sat, 3 Feb 2018 12:55:53 +0000 Subject: [PATCH] A64: Implement UMOV --- src/frontend/A64/decoder/a64.inc | 2 +- src/frontend/A64/translate/impl/simd_copy.cpp | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc index 871f8073..5612c790 100644 --- a/src/frontend/A64/decoder/a64.inc +++ b/src/frontend/A64/decoder/a64.inc @@ -673,7 +673,7 @@ INST(CMEQ_reg_2, "CMEQ (register)", "0Q101 // Data Processing - FP and SIMD - SIMD Copy INST(DUP_gen, "DUP (general)", "0Q001110000iiiii000011nnnnnddddd") //INST(SMOV, "SMOV", "0Q001110000iiiii001011nnnnnddddd") -//INST(UMOV, "UMOV", "0Q001110000iiiii001111nnnnnddddd") +INST(UMOV, "UMOV", "0Q001110000iiiii001111nnnnnddddd") //INST(INS_gen, "INS (general)", "01001110000iiiii000111nnnnnddddd") //INST(INS_elt, "INS (element)", "01101110000iiiii0iiii1nnnnnddddd") diff --git a/src/frontend/A64/translate/impl/simd_copy.cpp b/src/frontend/A64/translate/impl/simd_copy.cpp index dbe9ebab..b806da00 100644 --- a/src/frontend/A64/translate/impl/simd_copy.cpp +++ b/src/frontend/A64/translate/impl/simd_copy.cpp @@ -36,4 +36,23 @@ bool TranslatorVisitor::DUP_gen(bool Q, Imm<5> imm5, Reg Rn, Vec Vd) { return true; } +bool TranslatorVisitor::UMOV(bool Q, Imm<5> imm5, Vec Vn, Reg Rd) { + const size_t size = Common::LowestSetBit(imm5.ZeroExtend()); + if (size < 3 && Q) return UnallocatedEncoding(); + if (size == 3 && !Q) return UnallocatedEncoding(); + if (size > 3) return UnallocatedEncoding(); + + const size_t idxdsize = imm5.Bit<4>() ? 128 : 64; + const size_t index = imm5.ZeroExtend() >> (size + 1); + const size_t esize = 8 << size; + const size_t datasize = Q ? 64 : 32; + + const IR::U128 operand = V(idxdsize, Vn); + + const IR::UAny elem = ir.VectorGetElement(esize, operand, index); + X(datasize, Rd, ZeroExtend(elem, datasize)); + + return true; +} + } // namespace Dynarmic::A64