diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc
index 314d4b80..a5f94758 100644
--- a/src/frontend/A64/decoder/a64.inc
+++ b/src/frontend/A64/decoder/a64.inc
@@ -633,7 +633,7 @@ INST(INS_elt,                "INS (element)",                             "01101
 //INST(REV16_asimd,            "REV16 (vector)",                            "0Q001110zz100000000110nnnnnddddd")
 //INST(SADDLP,                 "SADDLP",                                    "0Q001110zz100000001010nnnnnddddd")
 //INST(CLS_asimd,              "CLS (vector)",                              "0Q001110zz100000010010nnnnnddddd")
-//INST(CNT,                    "CNT",                                       "0Q001110zz100000010110nnnnnddddd")
+INST(CNT,                    "CNT",                                       "0Q001110zz100000010110nnnnnddddd")
 //INST(SADALP,                 "SADALP",                                    "0Q001110zz100000011010nnnnnddddd")
 INST(XTN,                    "XTN, XTN2",                                 "0Q001110zz100001001010nnnnnddddd")
 //INST(FCVTN,                  "FCVTN, FCVTN2",                             "0Q0011100z100001011010nnnnnddddd")
diff --git a/src/frontend/A64/translate/impl/simd_two_register_misc.cpp b/src/frontend/A64/translate/impl/simd_two_register_misc.cpp
index 3d4500e7..27cf3c40 100644
--- a/src/frontend/A64/translate/impl/simd_two_register_misc.cpp
+++ b/src/frontend/A64/translate/impl/simd_two_register_misc.cpp
@@ -8,6 +8,19 @@
 
 namespace Dynarmic::A64 {
 
+bool TranslatorVisitor::CNT(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
+    if (size != 0b00) {
+        return ReservedValue();
+    }
+    const size_t datasize = Q ? 128 : 64;
+
+    const IR::U128 operand = V(datasize, Vn);
+    const IR::U128 result = ir.VectorPopulationCount(operand);
+
+    V(datasize, Vd, result);
+    return true;
+}
+
 bool TranslatorVisitor::XTN(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
     if (size == 0b11) {
         return ReservedValue();