From 8a60a63a8bfa49a78b5e5b614d7e06840c66902a Mon Sep 17 00:00:00 2001 From: Lioncash Date: Tue, 10 Apr 2018 13:48:24 -0400 Subject: [PATCH] A64: Implement SM3TT2B --- src/frontend/A64/decoder/a64.inc | 2 +- .../impl/simd_crypto_three_register.cpp | 16 ++++++++++++++-- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc index 7554f4f0..a9e1b00c 100644 --- a/src/frontend/A64/decoder/a64.inc +++ b/src/frontend/A64/decoder/a64.inc @@ -855,7 +855,7 @@ INST(USHLL, "USHLL, USHLL2", "0Q101 INST(SM3TT1A, "SM3TT1A", "11001110010mmmmm10ii00nnnnnddddd") INST(SM3TT1B, "SM3TT1B", "11001110010mmmmm10ii01nnnnnddddd") INST(SM3TT2A, "SM3TT2A", "11001110010mmmmm10ii10nnnnnddddd") -//INST(SM3TT2B, "SM3TT2B", "11001110010mmmmm10ii11nnnnnddddd") +INST(SM3TT2B, "SM3TT2B", "11001110010mmmmm10ii11nnnnnddddd") // Data Processing - FP and SIMD - SHA512 three register //INST(SHA512H, "SHA512H", "11001110011mmmmm100000nnnnnddddd") diff --git a/src/frontend/A64/translate/impl/simd_crypto_three_register.cpp b/src/frontend/A64/translate/impl/simd_crypto_three_register.cpp index bf97eba3..1ccca7de 100644 --- a/src/frontend/A64/translate/impl/simd_crypto_three_register.cpp +++ b/src/frontend/A64/translate/impl/simd_crypto_three_register.cpp @@ -47,7 +47,7 @@ static void SM3TT1(TranslatorVisitor& v, Vec Vm, Imm<2> imm2, Vec Vn, Vec Vd, SM v.ir.SetQ(Vd, result); } -static void SM3TT2(TranslatorVisitor& v, Vec Vm, Imm<2> imm2, Vec Vn, Vec Vd, [[maybe_unused]] SM3TTVariant behavior) { +static void SM3TT2(TranslatorVisitor& v, Vec Vm, Imm<2> imm2, Vec Vn, Vec Vd, SM3TTVariant behavior) { const IR::U128 d = v.ir.GetQ(Vd); const IR::U128 m = v.ir.GetQ(Vm); const IR::U128 n = v.ir.GetQ(Vn); @@ -60,7 +60,14 @@ static void SM3TT2(TranslatorVisitor& v, Vec Vm, Imm<2> imm2, Vec Vn, Vec Vd, [[ const IR::U32 top_n = v.ir.VectorGetElement(32, n, 3); const IR::U32 wj = v.ir.VectorGetElement(32, m, index); - const IR::U32 tt2 = v.ir.Eor(after_low_d, v.ir.Eor(top_d, before_top_d)); + const IR::U32 tt2 = [&] { + if (behavior == SM3TTVariant::A) { + return v.ir.Eor(after_low_d, v.ir.Eor(top_d, before_top_d)); + } + const IR::U32 tmp1 = v.ir.And(top_d, before_top_d); + const IR::U32 tmp2 = v.ir.And(v.ir.Not(top_d), after_low_d); + return v.ir.Or(tmp1, tmp2); + }(); const IR::U32 final_tt2 = v.ir.Add(tt2, v.ir.Add(low_d, v.ir.Add(top_n, wj))); const IR::U32 top_result = v.ir.Eor(final_tt2, v.ir.Eor(v.ir.RotateRight(final_tt2, v.ir.Imm8(23)), v.ir.RotateRight(final_tt2, v.ir.Imm8(15)))); @@ -89,4 +96,9 @@ bool TranslatorVisitor::SM3TT2A(Vec Vm, Imm<2> imm2, Vec Vn, Vec Vd) { return true; } +bool TranslatorVisitor::SM3TT2B(Vec Vm, Imm<2> imm2, Vec Vn, Vec Vd) { + SM3TT2(*this, Vm, imm2, Vn, Vd, SM3TTVariant::B); + return true; +} + } // namespace Dynarmic::A64