diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc index 73655bd0..ac9692f5 100644 --- a/src/frontend/A64/decoder/a64.inc +++ b/src/frontend/A64/decoder/a64.inc @@ -716,7 +716,7 @@ INST(SMIN, "SMIN", "0Q001 //INST(SABD, "SABD", "0Q001110zz1mmmmm011101nnnnnddddd") //INST(SABA, "SABA", "0Q001110zz1mmmmm011111nnnnnddddd") INST(ADD_vector, "ADD (vector)", "0Q001110zz1mmmmm100001nnnnnddddd") -//INST(CMTST_2, "CMTST", "0Q001110zz1mmmmm100011nnnnnddddd") +INST(CMTST_2, "CMTST", "0Q001110zz1mmmmm100011nnnnnddddd") INST(MLA_vec, "MLA (vector)", "0Q001110zz1mmmmm100101nnnnnddddd") INST(MUL_vec, "MUL (vector)", "0Q001110zz1mmmmm100111nnnnnddddd") //INST(SMAXP, "SMAXP", "0Q001110zz1mmmmm101001nnnnnddddd") diff --git a/src/frontend/A64/translate/impl/simd_three_same.cpp b/src/frontend/A64/translate/impl/simd_three_same.cpp index 1ca87cdd..1501d694 100644 --- a/src/frontend/A64/translate/impl/simd_three_same.cpp +++ b/src/frontend/A64/translate/impl/simd_three_same.cpp @@ -242,6 +242,23 @@ bool TranslatorVisitor::CMHS_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { return true; } +bool TranslatorVisitor::CMTST_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { + if (size == 0b11 && !Q) { + return ReservedValue(); + } + + const size_t datasize = Q ? 128 : 64; + const size_t esize = 8 << size.ZeroExtend(); + + const IR::U128 operand1 = V(datasize, Vn); + const IR::U128 operand2 = V(datasize, Vm); + const IR::U128 anded = ir.VectorAnd(operand1, operand2); + const IR::U128 result = ir.VectorNot(ir.VectorEqual(esize, anded, ir.ZeroVector())); + + V(datasize, Vd, result); + return true; +} + bool TranslatorVisitor::USHL_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { if (size == 0b11 && !Q) { return ReservedValue();