diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc
index 01a4a489..29d0705b 100644
--- a/src/frontend/A64/decoder/a64.inc
+++ b/src/frontend/A64/decoder/a64.inc
@@ -869,7 +869,7 @@ INST(RAX1,                   "RAX1",                                      "11001
 // Data Processing - FP and SIMD - Cryptographic four register
 INST(EOR3,                   "EOR3",                                      "11001110000mmmmm0aaaaannnnnddddd")
 INST(BCAX,                   "BCAX",                                      "11001110001mmmmm0aaaaannnnnddddd")
-//INST(SM3SS1,                 "SM3SS1",                                    "11001110010mmmmm0aaaaannnnnddddd")
+INST(SM3SS1,                 "SM3SS1",                                    "11001110010mmmmm0aaaaannnnnddddd")
 
 // Data Processing - FP and SIMD - SHA512 two register
 //INST(SHA512SU0,              "SHA512SU0",                                 "1100111011000000100000nnnnnddddd")
diff --git a/src/frontend/A64/translate/impl/simd_crypto_four_register.cpp b/src/frontend/A64/translate/impl/simd_crypto_four_register.cpp
index bdfb1787..973eb625 100644
--- a/src/frontend/A64/translate/impl/simd_crypto_four_register.cpp
+++ b/src/frontend/A64/translate/impl/simd_crypto_four_register.cpp
@@ -30,4 +30,24 @@ bool TranslatorVisitor::BCAX(Vec Vm, Vec Va, Vec Vn, Vec Vd) {
     return true;
 }
 
+bool TranslatorVisitor::SM3SS1(Vec Vm, Vec Va, Vec Vn, Vec Vd) {
+    const IR::U128 a = ir.GetQ(Va);
+    const IR::U128 m = ir.GetQ(Vm);
+    const IR::U128 n = ir.GetQ(Vn);
+
+    const IR::U32 top_a = ir.VectorGetElement(32, a, 3);
+    const IR::U32 top_m = ir.VectorGetElement(32, m, 3);
+    const IR::U32 top_n = ir.VectorGetElement(32, n, 3);
+
+    const IR::U32 rotated_n = ir.RotateRight(top_n, ir.Imm8(20));
+    const IR::U32 sum = ir.Add(ir.Add(rotated_n, top_m), top_a);
+    const IR::U32 result = ir.RotateRight(sum, ir.Imm8(25));
+
+    const IR::U128 zero_vector = ir.ZeroVector();
+    const IR::U128 vector_result = ir.VectorSetElement(32, zero_vector, 3, result);
+
+    ir.SetQ(Vd, vector_result);
+    return true;
+}
+
 } // namespace Dynarmic::A64