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Author SHA1 Message Date
MerryMage
a3432102b8 jit_state: Split off CPSR.Q 2020-04-22 20:26:40 +01:00
MerryMage
4f8675083c interface_x64: Fix MSVC cast warning 2020-04-22 20:26:40 +01:00
MerryMage
311361b409 jit_state: Split off CPSR.{E,T} 
This allows us to improve code-emission for PopRSBHint. We also improve
code emission other terminals at the same time.
 2020-04-22 20:26:40 +01:00
MerryMage
cb119c2f72 emit_x64: Use boost::icl::interval_map to speed up ranged invalidation 2020-04-22 20:26:40 +01:00
MerryMage
3cca3bbd0b jit_state: Split off CPSR.GE 2020-04-22 20:26:40 +01:00
MerryMage
6fde29f5d8 emit_x64: Remove unnecessary ABI overhead in ReadMemory, WriteMemory 2020-04-22 20:26:40 +01:00
MerryMage
6adc554b53 jit_state: Hide cpsr implementation 2020-04-22 20:26:40 +01:00
MerryMage
eb80aae9c0 block_of_code: Move MXCSR switching out of dispatch loop 
Also clarify MXCSR entry/exit terminology
 2020-04-22 20:26:40 +01:00
MerryMage
a4e85ad565 emit_x64: Make RSB a stack 2020-04-22 20:26:40 +01:00
MerryMage
2a818f9d8e Merge branch 'timing' 
We do this to improve timing information before entering a supervior
function. We also do this to try and stay within JITted code as much
as possible, by updating the cycles we have remaining.
 2020-04-22 20:26:37 +01:00
MerryMage
ea4c3292d5 BlockOfCode: Detect space remaining 
We also clear the code cache when we run out of space.

This closes #111.
 2020-04-22 20:26:12 +01:00
MerryMage
256749910f Add AddTicks and GetTicksRemaining callbacks 2020-04-22 20:26:12 +01:00
MerryMage
80c56aa89d Remove unnecessary use of boost::make_optional 
Closes #119.
 2020-04-22 20:26:12 +01:00
MerryMage
de6a93a160 decoder_detail: Lambda captures may be unused if iota is an empty sequence 
Closes #120
 2020-04-22 20:26:12 +01:00
MerryMage
3141dadea9 Remove UNUSED macro 2020-04-22 20:26:12 +01:00
MerryMage
7cac9519b0 microinstruction: Remove DecrementRemainingUses 2020-04-22 20:26:12 +01:00
MerryMage
639f7cfd2d reg_alloc: Add IsLastUse optimization for UseScratch 2020-04-22 20:26:12 +01:00
MerryMage
6b122751fe reg_alloc: Remove reliance on IR::Inst::DecrementRemainingUses 2020-04-22 20:26:12 +01:00
MerryMage
30049ca928 emit_x86: Standardize time of DefineValue call 2020-04-22 20:26:12 +01:00
MerryMage
5d72f7048f basic_block: Add inst address and use count to DumpBlock 
This additional output assists with debugging.
 2020-04-22 20:26:12 +01:00
Mat M
c6d09adcb7 CMakeLists: Derive the source file listings from targets directly (#118) 
This gets rid of the need to store to individual variables before creating
the target itself, cleaning up the variables in the surrounding scope a little bit.
 2020-04-22 20:26:07 +01:00
MerryMage
12eaf496fd emit_x64: Perform mask creation for packed instructions in SSE 2020-04-22 20:26:07 +01:00
MerryMage
305e4baa29 emit_x64: Eliminate conversion of GE flags 
* We do this so that we can simplify PackedSelect.
* We also try to minimise xmm-gpr/gpr-xmm transfers in PackedSelect.
 2020-04-22 20:26:07 +01:00
MerryMage
d1e0a29cd9 Implement IR instruction PackedSelect, reimplement SEL 2020-04-22 20:26:07 +01:00
MerryMage
18f11972c6 emit_x64: Remove SSSE3 implementation of PackedHalvingAddU8 
It is much slower than the SSE2 implementation, so there's no point keeping it around.
 2020-04-22 20:26:07 +01:00
MerryMage
c4b40909f7 emit_x64: Improve code emission of FPCompare{32,64} 
Replace if-chain with table lookup
 2020-04-22 20:26:07 +01:00
MerryMage
814e378249 VCMP and VCMPE were the other way around 
- This was due to a misunderstanding of what the E in VCMPE means.
- The E refers to an exception being raised when a QNaN is encountered.
- Added unit tests for VCMP{E}
 2020-04-22 20:26:07 +01:00
MerryMage
08f638d447 emit_x64: pmaxuw and pminuw require SSE 4.1 
This commit is intended to close citra-emu/citra#3137.

pmaxuw and pminuw were used to perform unsigned comparisons; we emulate
these using a signed comparison by offsetting the inputs by 0x8000 for
CPUs that do not support SSE 4.1.
 2020-04-22 20:26:07 +01:00
Mat M
522992965a Common: Delete Pool's copy constructor and copy/move assignment operators (#117) 
The language defines a copy constructor as:

TypeName(const TypeName&)

so this was just deleting a constructor variant that would catch most cases of attempted copies.
 2020-04-22 20:22:01 +01:00
Mat M
77fe2aeeaa emit_x64: Amend doxygen parameters for InvalidateCacheRange() (#116) 2020-04-22 20:22:01 +01:00
MerryMage
19dcdde90b block_of_code: Add vzeroupper instructions where AVX-SSE transitions may occur 2020-04-22 20:22:01 +01:00
MerryMage
60d9392b5c block_of_code: BlockOfCode should provide cpu info 2020-04-22 20:22:01 +01:00
MerryMage
148c01e08f interface_x64: Remove is_executing assert from HaltExecution 
In multithreaded code this can be triggered due to a race.
 2017-10-14 23:35:01 +01:00
MerryMage
f6cf265bc5 block_of_code: BlockOfCode::ABI_* should be const 2017-09-29 01:35:24 +01:00
MerryMage
29471be317 Standardize location of storage-class specifiers: Place at beginning of declarations 
Justification: C99 specifies that doing otherwise is an obsolescent feature.
 2017-09-29 01:23:45 +01:00
MerryMage
b992e5f8ec Ranged cache invalidation 
* Fix clearing code block on a partial invalidation
* Remove unnecessary use of boost::variant
* Code cleanup
 2017-09-11 00:11:05 +01:00
Lioncash
80477b5a67 externals: update fmt to 4.0 2017-08-27 21:43:21 +01:00
MerryMage
568b52d4ba externals: Update Xbyak to v5.51 
Xbyak now supports multi-byte nops
 2017-08-17 21:34:54 +01:00
MerryMage
1613846ab0 reg_alloc: Handle XMM registers in LoadImmediate 2017-08-16 23:11:05 +01:00
MerryMage
993e142c6b disassembler: Fix RegList 2017-08-05 01:57:29 +01:00
MerryMage
6197bde0fc disassembler_arm: Fix disassembly of LDRH (reg) 2017-07-30 18:45:55 +01:00
Yuri Kunde Schlesner
38eb7e0314 emit_x64: Use alternative Xbyak names for and, or, xor 
Also enabled XBYAK_NO_OP_NAMES, allowing us to stop using
-fno-operator-names.
 2017-06-12 07:57:46 +01:00
James Rowe
82e8c99a47 Link against static fmtlib instead of header only 
When including fmtlib as a header only library in dynarmic, downstream
projects cannot include fmtlib as a static library without getting
linker errors.
 2017-05-22 08:23:03 +01:00
MerryMage
599a613fea Move SEL from status_register_access to misc 2017-04-25 13:57:27 +01:00
MerryMage
50bb317104 parallel: UQADD8 and UQADD16 are unpredictable when {d|n|m} == 15 2017-04-25 13:45:31 +01:00
MerryMage
7639dfea51 coprocessor: Use && instead of & with boolean arguments 2017-04-22 15:05:31 +01:00
MerryMage
2c9dcfa2db backend_x64: Rename UnwindHandler to ExceptionHandler 2017-04-20 14:08:56 +01:00
MerryMage
0d47f50f57 block_of_code: Implement farcode 2017-04-19 18:58:36 +01:00
MerryMage
1c21ae6bcd saturated: Implement QASX, QSAX, UQASX, UQSAX 2017-04-10 10:21:51 +01:00
MerryMage
9ac890c62d reg_alloc: Fix for LLVM's interpretation of the System V ABI 
This aspect of the System V ABI is under-defined. LLVM choses a
different interpretation from GCC and ICC.

Most other compilers assume the callee is responsible zero-ing the
upper bits of the register if necessary. LLVM assumes the caller
has zero-extended the register.

This is a quick fix for this problem until zext-tracking is
implemented.
 2017-04-08 22:12:37 +01:00
MerryMage
a5bb81a97c backend_x64: Remove dispatch loop in Jit::Run 2017-04-08 10:04:53 +01:00
MerryMage
1b37420459 backend_x64: Simplify dispatcher 2017-04-08 09:35:45 +01:00
MerryMage
523ae542f4 microinstruction: Implement HasAssociatedPseudoOperation 2017-04-04 13:10:50 +01:00
MerryMage
4c5de3905b emit_x64: Correct mutation of immutable in FPThreeOp{32,64} 
operand (args[1]) was erroneously declared as non-scratch.
operand's value could be modified if FTZ was enabled.
 2017-04-01 09:57:14 +01:00
MerryMage
05e97058c3 parallel: Add and Subtract with Exchange improvements 
* Remove asx argument from PackedHalvingSubAdd{U16,S16} IR instruction
* Implement Packed{Halving,}{AddSub,SubAdd}{U16,S16} IR instructions
* Implement SASX, SSAX, UASX, USAX
 2017-03-24 15:56:24 +00:00
Lynn
fd068ed6b8 Ranged cache invalidation 2017-03-20 11:58:25 +00:00
MerryMage
d9c69ad997 constant_pool: Implement a constant pool 2017-03-19 13:08:04 +00:00
Lioncash
5a02da445a CMakeLists: Only link LLVM libs against the library 
LLVM library code is only used within the main dynarmic library, not the test executable.
 2017-03-11 13:25:14 +00:00
Lioncash
d85137ed65 interface_x64: Amend LLVM disassembly code 
This would previously attempt to perform pointer arithmetic on void pointers,
which would cause compilation errors.
 2017-03-07 18:32:04 +00:00
Lioncash
d0efbb9348 CMakeLists: Remove unnecessary linker language specifiers 
This is already inferred by the cmake project being declared a CXX project.
 2017-03-07 18:30:58 +00:00
Lioncash
9906be746f CMakeLists: Make boost an interface library target 
Gets rid of the use of a non-target include and makes libraries
explicitly link against the identifier name in order to get includes.
 2017-03-04 11:52:32 +00:00
MerryMage
6396bd02f0 Merge branch 'simplify-reg-alloc' 2017-02-27 00:11:52 +00:00
MerryMage
92a01b0cd8 Prefer ASSERT to DEBUG_ASSERT 2017-02-26 23:30:40 +00:00
MerryMage
135346eb2e reg_alloc: Move implementations out of header 2017-02-26 23:30:39 +00:00
MerryMage
184db36caf reg_alloc: Call DecrementRemainingUses in only one place 2017-02-26 23:30:38 +00:00
MerryMage
51fc9fec05 reg_alloc: Reorganize 2017-02-26 23:30:37 +00:00
MerryMage
cf93ab3d31 reg_alloc: Remove old register allocator interface 2017-02-26 23:12:26 +00:00
MerryMage
08a467bf9a emit_x64: Port to new register allocator interface 2017-02-26 23:12:25 +00:00
Lioncash
662e07337f CMakeLists: Don't explicitly signify dynarmic as a static lib 
This allows a user of the library to explicitly control which kind of
library type should be built with the CMake BUILD_SHARED_LIBS flag.

By default, libraries will build as static without this specifier.
 2017-02-26 23:08:49 +00:00
MerryMage
f883bad2cc reg_alloc: New register allocation interface 2017-02-26 21:37:35 +00:00
MerryMage
13ac0c234e reg_alloc: Differentiate between ReadLock and WriteLock 2017-02-26 21:37:34 +00:00
MerryMage
6c3df057fa reg_alloc: Remove unused functions 2017-02-26 21:37:33 +00:00
MerryMage
1ee4c07f14 reg_alloc: Reimplement ScratchHostLocReg 2017-02-26 21:37:32 +00:00
MerryMage
640faab8a7 reg_alloc: UseHostLoc is no longer necessary 2017-02-26 21:37:30 +00:00
MerryMage
9518bbe06e reg_alloc: Reimplement UseScratchHostLocReg 2017-02-26 21:37:29 +00:00
MerryMage
e1d8238c50 reg_alloc: Stub UseOpArg 2017-02-26 21:37:27 +00:00
MerryMage
2b078152e7 reg_alloc: Reimplement UseHostLocReg 2017-02-26 21:37:26 +00:00
MerryMage
aefe550428 reg_alloc: Remove the Def concept from register allocator internals 2017-02-26 21:37:25 +00:00
MerryMage
65cccf070e reg_alloc: Properly encapsulate HostLocInfo 2017-02-26 21:37:24 +00:00
MerryMage
469bb6253f backend_x64: Factor EmitExclusiveWriteMemory64 into ExclusiveWrite 2017-02-26 15:34:26 +00:00
MerryMage
d7ab1f9c64 backend_x64: Fix ABI violation in ReadMemory and WriteMemory 
Caller-save registers were not saved before call instruction.

Refer to issue #98.
 2017-02-26 15:34:25 +00:00
MerryMage
3768174783 ir_opt: Constant propagation pass works better with a DCE just before it 2017-02-26 15:28:35 +00:00
MerryMage
157585887e ir_opt: Simplify dead-code elimination pass 2017-02-26 15:28:34 +00:00
MerryMage
bbeea72eba ir_opt: Remove redundant shift instructions 2017-02-26 15:28:14 +00:00
MerryMage
517fe0f18e emit_x64: WriteMemory* microinstructions do not define a value 2017-02-25 11:54:47 +00:00
MerryMage
1ff60bc69f reg_alloc: Move OpArg into own header 2017-02-21 23:38:36 +00:00
MerryMage
4ed8ee7489 microinstruction: Void arguments when invalidating instruction 2017-02-18 21:29:23 +00:00
MerryMage
7fa5845c1f extension: Implement SXTAB16 and SXTB16 2017-02-18 20:14:44 +00:00
MerryMage
73d1cf36c3 extension: Simplify UXTB16 2017-02-18 20:14:39 +00:00
MerryMage
6edcfeba0b extension: Simplify rotation code 2017-02-18 20:14:37 +00:00
MerryMage
cc9d2c4603 saturated: Implement SSAT16 and USAT16 2017-02-18 17:43:57 +00:00
MerryMage
358cf7c322 vfp: Implement vectorized VFP instructions 2017-02-18 01:13:25 +00:00
MerryMage
f2dd82967f load_store: Simplify implementation 
* Remove dead code
* Standardise code style with rest of code base
 2017-02-16 22:28:56 +00:00
MerryMage
058f7b5de6 emit_x64: Make EmitTerminal type-safe 
Avoid the use of boost::variant::which, which tends to produce code which
is not verifiable at compile-time.
 2017-02-16 19:40:51 +00:00
MerryMage
e197b10b96 common: Introduce utility function VisitVariant 
VisitVariant allows one to use a generic lambda to visit a boost::variant.
This is necessary because boost::visit_variant requires the visitor type
to provide a return type.
 2017-02-16 19:30:56 +00:00
MerryMage
5a20a37d3f arm/fpscr: Correct Stride implementation 2017-02-11 12:13:57 +00:00
MerryMage
033e8b9b1e vfp: Rename variables a, b, c to more sensible names 2017-02-06 21:14:36 +00:00
MerryMage
2af39dfaa8 emit_x64: Make reg_alloc a local variable 
reg_alloc contains state that is only valid on a per-block basis, so there
is no reason for it to be a member variable.
 2017-02-04 09:29:35 +00:00
MerryMage
a0e9417912 ir_opt: Initial constant propagation pass implementation 2017-01-30 21:49:46 +00:00
MerryMage
2447f2f360 callbacks: Factorize memory callbacks into inner structure 2017-01-30 21:42:51 +00:00