MerryMage
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1c21ae6bcd
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saturated: Implement QASX, QSAX, UQASX, UQSAX
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2017-04-10 10:21:51 +01:00 |
|
MerryMage
|
523ae542f4
|
microinstruction: Implement HasAssociatedPseudoOperation
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2017-04-04 13:10:50 +01:00 |
|
MerryMage
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05e97058c3
|
parallel: Add and Subtract with Exchange improvements
* Remove asx argument from PackedHalvingSubAdd{U16,S16} IR instruction
* Implement Packed{Halving,}{AddSub,SubAdd}{U16,S16} IR instructions
* Implement SASX, SSAX, UASX, USAX
|
2017-03-24 15:56:24 +00:00 |
|
Lynn
|
fd068ed6b8
|
Ranged cache invalidation
|
2017-03-20 11:58:25 +00:00 |
|
MerryMage
|
92a01b0cd8
|
Prefer ASSERT to DEBUG_ASSERT
|
2017-02-26 23:30:40 +00:00 |
|
MerryMage
|
bbeea72eba
|
ir_opt: Remove redundant shift instructions
|
2017-02-26 15:28:14 +00:00 |
|
MerryMage
|
4ed8ee7489
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microinstruction: Void arguments when invalidating instruction
|
2017-02-18 21:29:23 +00:00 |
|
MerryMage
|
7fa5845c1f
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extension: Implement SXTAB16 and SXTB16
|
2017-02-18 20:14:44 +00:00 |
|
MerryMage
|
73d1cf36c3
|
extension: Simplify UXTB16
|
2017-02-18 20:14:39 +00:00 |
|
MerryMage
|
6edcfeba0b
|
extension: Simplify rotation code
|
2017-02-18 20:14:37 +00:00 |
|
MerryMage
|
cc9d2c4603
|
saturated: Implement SSAT16 and USAT16
|
2017-02-18 17:43:57 +00:00 |
|
MerryMage
|
358cf7c322
|
vfp: Implement vectorized VFP instructions
|
2017-02-18 01:13:25 +00:00 |
|
MerryMage
|
f2dd82967f
|
load_store: Simplify implementation
* Remove dead code
* Standardise code style with rest of code base
|
2017-02-16 22:28:56 +00:00 |
|
MerryMage
|
5a20a37d3f
|
arm/fpscr: Correct Stride implementation
|
2017-02-11 12:13:57 +00:00 |
|
MerryMage
|
033e8b9b1e
|
vfp: Rename variables a, b, c to more sensible names
|
2017-02-06 21:14:36 +00:00 |
|
MerryMage
|
642ccb0f66
|
ir/value: Support U16 immediates
|
2017-01-29 22:58:11 +00:00 |
|
MerryMage
|
5f7ffe0d0b
|
microinstruction: Implement Inst::AreAllArgsImmediates
|
2017-01-29 22:56:59 +00:00 |
|
MerryMage
|
22804dc6a5
|
microinstruction: Arguments of Inst::Use and Inst::UndoUse should be const
|
2017-01-29 22:53:46 +00:00 |
|
MerryMage
|
1d4446cad5
|
microinstruction: Removed unnecessary reference from argument of Inst::ReplaceUsesWith
|
2017-01-29 22:52:33 +00:00 |
|
MerryMage
|
e3bc7d039f
|
Implement CDP, LDC, MCR, MCRR, MRC, MRRC, STC
|
2017-01-08 14:56:06 +00:00 |
|
MerryMage
|
48693eb6ff
|
Implement coprocessor-related microinstructions
* CoprocInternalOperation
* CoprocSendOneWord
* CoprocSendTwoWords
* CoprocGetOneWord
* CoprocGetTwoWords
* CoprocLoadWords
* CoprocStoreWords
|
2017-01-08 14:56:06 +00:00 |
|
MerryMage
|
b3ae57619d
|
types: Formatting for CoprogReg
|
2017-01-08 14:56:06 +00:00 |
|
MerryMage
|
d8a37e287c
|
IR: Add IR type CoprocInfo
|
2017-01-08 14:56:06 +00:00 |
|
MerryMage
|
1efd3a764d
|
IR: Remove unused microinstructions NegateLowWord and NegateHighWord
|
2017-01-05 20:16:39 +00:00 |
|
Fernando Sahmkow
|
70f4235ee9
|
Implement UXTAB16 (#78)
|
2016-12-29 12:15:18 +00:00 |
|
FernandoS27
|
d5610eb26c
|
Implement UHASX, UHSAX, SHASX and SHSAX (#75)
|
2016-12-28 21:32:22 +00:00 |
|
MerryMage
|
e9df248d56
|
decoder_detail: Support const member functions
|
2016-12-23 11:33:40 +00:00 |
|
MerryMage
|
b1bad4b5cc
|
decoder_detail: static_assert member function is from visitor class
Improves readability of compiler errors.
|
2016-12-23 11:10:02 +00:00 |
|
MerryMage
|
c78f153ddb
|
decoder/arm: Sort decoders according to number of bits in mask
|
2016-12-22 15:25:38 +00:00 |
|
MerryMage
|
cb38c94b58
|
decoder/arm: Fix decoding of RFE
|
2016-12-22 15:25:07 +00:00 |
|
MerryMage
|
7e77ee7fd6
|
decoder/arm: Fix decoding of MCR2
|
2016-12-22 15:11:47 +00:00 |
|
Fernando Sahmkow
|
677f62dd6f
|
Implement SHSUB8 and SHSUB16 (#74)
* Implement IR operations PackedHalvingSubS8 and PackedHalvingSubS16
|
2016-12-22 12:02:24 +00:00 |
|
MerryMage
|
967f3cf7e1
|
Implement CPS (Thumb)
* Since currently only User mode is emulated, CPS is a NOP.
|
2016-12-21 22:44:27 +00:00 |
|
MerryMage
|
c764a2b889
|
Implement MUL (T1)
|
2016-12-21 22:44:14 +00:00 |
|
MerryMage
|
36082087de
|
callbacks: Read code using MemoryReadCode callback
|
2016-12-21 21:39:14 +00:00 |
|
MerryMage
|
56ea2386d3
|
saturated: Implement SSAT and USAT
|
2016-12-21 19:51:25 +00:00 |
|
MerryMage
|
6a269a6ebd
|
IR: Add microinstructions UnsignedSaturation and SignedSaturation
|
2016-12-21 19:51:25 +00:00 |
|
FernandoS27
|
8919265d2c
|
Implement SADD8, SADD16, SSUB8, SSUB16, USUB16
|
2016-12-20 21:52:38 +00:00 |
|
FernandoS27
|
3f6ecfe245
|
Implemented USAD8 and USADA8
|
2016-12-20 21:52:38 +00:00 |
|
MerryMage
|
96e46ba6b5
|
Implement QADD, QSUB, QDADD, QDSUB
|
2016-12-15 22:34:29 +00:00 |
|
MerryMage
|
b178ab3bec
|
Replace (void)(...); idiom with UNUSED macro
|
2016-12-15 21:36:05 +00:00 |
|
MerryMage
|
df197ff6b1
|
arm/types: Use smallest possible standard type that has sufficient bits for Imm{} types
|
2016-12-15 20:52:21 +00:00 |
|
MerryMage
|
546198d603
|
translate_arm: Mark arguments as unused
|
2016-12-15 20:52:20 +00:00 |
|
MerryMage
|
8d5522f4a0
|
dissassembler_arm: Support BKPT, QASX, QSAX, UQASX, UQSAX
|
2016-12-15 20:16:08 +00:00 |
|
MerryMage
|
52e1445f43
|
Implement USUB8
|
2016-12-05 00:29:15 +00:00 |
|
MerryMage
|
5c1aab1666
|
Implement CLZ
Includes tests
|
2016-12-04 22:56:33 +00:00 |
|
MerryMage
|
1a1646d962
|
Implement UADD8
|
2016-12-04 20:52:33 +00:00 |
|
MerryMage
|
7cad6949e7
|
IR: Implement new pseudo-operation GetGEFromOp
|
2016-12-04 20:52:06 +00:00 |
|
MerryMage
|
e166965f3e
|
Implement VCMP
|
2016-12-03 11:41:09 +00:00 |
|
MerryMage
|
f2fe376fc6
|
Support 64-bit immediates
|
2016-12-03 11:29:50 +00:00 |
|