MerryMage
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2d164d9345
|
Package up emit context
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2020-04-22 20:38:31 +01:00 |
|
MerryMage
|
63bd1ece23
|
backend_x64: Split A32 specific emission into separate class
|
2020-04-22 20:38:29 +01:00 |
|
MerryMage
|
8bef20c24d
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IR: Split off A32 specific opcodes
|
2020-04-22 20:33:32 +01:00 |
|
MerryMage
|
b3c73e2622
|
Label A32 specific code appropriately
|
2020-04-22 20:33:30 +01:00 |
|
MerryMage
|
a4e85ad565
|
emit_x64: Make RSB a stack
|
2020-04-22 20:26:40 +01:00 |
|
MerryMage
|
cb119c2f72
|
emit_x64: Use boost::icl::interval_map to speed up ranged invalidation
|
2020-04-22 20:26:40 +01:00 |
|
Mat M
|
77fe2aeeaa
|
emit_x64: Amend doxygen parameters for InvalidateCacheRange() (#116)
|
2020-04-22 20:22:01 +01:00 |
|
MerryMage
|
60d9392b5c
|
block_of_code: BlockOfCode should provide cpu info
|
2020-04-22 20:22:01 +01:00 |
|
MerryMage
|
a5bb81a97c
|
backend_x64: Remove dispatch loop in Jit::Run
|
2017-04-08 10:04:53 +01:00 |
|
Lynn
|
fd068ed6b8
|
Ranged cache invalidation
|
2017-03-20 11:58:25 +00:00 |
|
MerryMage
|
058f7b5de6
|
emit_x64: Make EmitTerminal type-safe
Avoid the use of boost::variant::which, which tends to produce code which
is not verifiable at compile-time.
|
2017-02-16 19:40:51 +00:00 |
|
MerryMage
|
2af39dfaa8
|
emit_x64: Make reg_alloc a local variable
reg_alloc contains state that is only valid on a per-block basis, so there
is no reason for it to be a member variable.
|
2017-02-04 09:29:35 +00:00 |
|
MerryMage
|
b1d3e7aae9
|
emit_x64: Refactor patching code
* Only have a single std::unordered_map for patching information
* Factor patch emitters into own functions
* Implement EmitX64::Unpatch
|
2016-12-20 14:06:55 +00:00 |
|
Lioncash
|
fafa845f64
|
emit_x64: Make GetBasicBlock() const qualified
|
2016-12-05 12:46:22 +00:00 |
|
Lioncash
|
6a16edc0fb
|
emit_x64: Move implementations into the cpp file
Prevents needing to rebuild everything including the emitter if any
details ever change.
|
2016-12-05 12:46:22 +00:00 |
|
Lioncash
|
282029f60a
|
emit_x64: Forward declare BlockOfCode
|
2016-12-05 12:46:22 +00:00 |
|
Sebastian Valle
|
4d44474ad4
|
Implemented the ARM UHADD8 instruction. (#45)
The x64 implementation uses the SSSE3 instruction PSHUFB.
A non-SSE fallback is provided in case the CPU doesn't support it.
|
2016-11-25 20:32:22 +00:00 |
|
Mat M
|
6d53bb6d7e
|
arm_types: Split out LocationDescriptor (#20)
This isn't really an ARM-specific type, since it's used to indicate a
Block location.
|
2016-09-05 11:54:09 +01:00 |
|
Mat M
|
7f9a0c3c38
|
Remove unnecessary explicit includes (#16)
|
2016-09-03 21:48:03 +01:00 |
|
Mat M
|
05b189bc26
|
arm_types: Specialize std::hash for LocationDescriptor (#14)
Same thing, but with the benefit of working with anything that uses
std::hash by default.
|
2016-09-03 12:48:47 +01:00 |
|
MerryMage
|
4f6ea715b2
|
emit_x64: EmitX64::Emit doesn't need descriptor argument
|
2016-08-26 19:14:25 +01:00 |
|
MerryMage
|
ed3a686d1d
|
Implement public header files
|
2016-08-26 00:44:50 +01:00 |
|
MerryMage
|
656d4f7252
|
emit_x64: inhibit_emission is obsolete
Not used anymore; unused ever since intrusive lists were introduced.
|
2016-08-25 23:24:16 +01:00 |
|
MerryMage
|
e32812cd00
|
Port x64 backend to xbyak
|
2016-08-25 16:18:17 +01:00 |
|
MerryMage
|
b2de47954b
|
EmitX64: Emit correct cycle count on cond failure
|
2016-08-18 18:16:18 +01:00 |
|
Lioncash
|
841098a0bc
|
ir: separate components out a little more
|
2016-08-17 20:46:21 +01:00 |
|
MerryMage
|
7d7ac0af71
|
Optimization: Make SVC use RSB
|
2016-08-15 15:02:08 +01:00 |
|
MerryMage
|
6c45619aa1
|
Optimization: Implement terminal LinkBlockFast
|
2016-08-15 14:33:17 +01:00 |
|
MerryMage
|
960d14d18e
|
Optimization: Implement Return Stack Buffer
|
2016-08-13 00:10:23 +01:00 |
|
MerryMage
|
1029fd27ce
|
Update documentation (2016-08-12)
|
2016-08-12 18:17:31 +01:00 |
|
MerryMage
|
abd113f160
|
EmitX64: Renamed patch_jmp_locations to patch_jg_locations
|
2016-08-08 15:56:07 +01:00 |
|
MerryMage
|
a32063fa60
|
EmitX64: Implement block linking
|
2016-08-07 22:11:39 +01:00 |
|
MerryMage
|
aba705f6b9
|
BackendX64: Merge Routines into BlockOfCode
|
2016-08-07 18:08:48 +01:00 |
|
Tillmann Karras
|
af27ef8d6c
|
Optionally disassemble x86_64 code using LLVM
|
2016-08-05 02:08:41 +01:00 |
|
Tillmann Karras
|
306e070ab5
|
Use opcodes.inc for emit_x64.h
|
2016-08-03 00:44:08 +01:00 |
|
MerryMage
|
be87038ffd
|
IROpt: Port get/set elimination pass to current IR
|
2016-08-02 11:51:05 +01:00 |
|
MerryMage
|
51448aa06d
|
More Speed
|
2016-07-22 23:55:00 +01:00 |
|
MerryMage
|
90d317b868
|
Implement memory endianness. Implement Thumb SETEND instruction.
|
2016-07-20 15:34:17 +01:00 |
|
Subv
|
703a46ec99
|
Pass the current IR::Block by reference to the emitter.
This avoids calling the copy constructor more times than needed.
|
2016-07-18 11:27:33 -05:00 |
|
MerryMage
|
3720da4e19
|
Implement thumb16_{SXTH,SXTB,UXTH,UXTB,REV,REV16,REVSH}
|
2016-07-16 19:23:42 +01:00 |
|
MerryMage
|
9b2aff166a
|
Implement arm_SVC
|
2016-07-14 14:29:46 +01:00 |
|
MerryMage
|
7d7751c157
|
Allow IR blocks to require a cond for block entry.
* IR: Add cond, cond_failed.
* backend_x64/EmitX64: Implement EmitCondPrelude
|
2016-07-14 12:52:53 +01:00 |
|
MerryMage
|
09420d190b
|
IR: Implement IR microinstructions ALUWritePC and LoadWritePC
|
2016-07-12 10:58:14 +01:00 |
|
MerryMage
|
1410221b47
|
Implement thumb1_STR_reg, thumb1_STRH_reg, thumb1_STRB_reg
|
2016-07-11 23:11:05 +01:00 |
|
MerryMage
|
e7922e4fef
|
Implement thumb1_LDR_literal, thumb1_LDR_imm_t1
|
2016-07-11 22:43:53 +01:00 |
|
MerryMage
|
d11df9067d
|
Implement thumb1_BIC_reg
|
2016-07-10 10:44:45 +08:00 |
|
MerryMage
|
98a64a92b1
|
Implement thumb1_ORR_reg
|
2016-07-10 09:06:38 +08:00 |
|
MerryMage
|
8145b33882
|
Implemented thumb1_ROR_reg
|
2016-07-10 08:18:17 +08:00 |
|
MerryMage
|
92142d5a22
|
Implement thumb1_SUB_reg
|
2016-07-08 18:49:30 +08:00 |
|
MerryMage
|
df0c324923
|
Implement thumb1_EOR_reg
|
2016-07-08 18:14:54 +08:00 |
|