Lioncash
44d846045a
A64: Implement SHA512SU0
2020-04-22 20:46:16 +01:00
Lioncash
ca903c1585
A64: Implement SHA256H and SHA256H2
2020-04-22 20:46:16 +01:00
MerryMage
e4237c44eb
A64: Implement SCVTF (vector, integer), scalar varaint
2020-04-22 20:46:16 +01:00
MerryMage
bfba38d0b6
impl: Reorganize scalar two-register misc instructions
2020-04-22 20:46:16 +01:00
Lioncash
ea582b17cc
A64: Implement SHA256SU1
2020-04-22 20:46:16 +01:00
Lioncash
06c5dcaf5e
simd_two_register_misc: Add missing zeroing of the vector for CMGT and CMLT
2020-04-22 20:46:16 +01:00
Lioncash
0d50d7314b
A64: Implement CMGE (zero)'s vector variant
2020-04-22 20:46:16 +01:00
Lioncash
ab35dc0e78
A64: Implement MLS (by element)
2020-04-22 20:46:16 +01:00
Lioncash
1651e60462
A64: Implement MUL (by element)
2020-04-22 20:46:16 +01:00
MerryMage
a86d4093cd
A64: Implement MLA (by element)
2020-04-22 20:46:16 +01:00
Lioncash
7f47402609
A64: Implement ABS (scalar)
2020-04-22 20:46:16 +01:00
Lioncash
c8eb4528be
A64: Implement SHA256SU0
2020-04-22 20:46:16 +01:00
Lioncash
181c3b0790
A64: Implement SHA1M
2020-04-22 20:46:16 +01:00
Lioncash
47bc97a71b
A64: Implement SHA1P
2020-04-22 20:46:16 +01:00
Lioncash
718f3e9bb4
A64: Implement scalar variants of CMEQ, CMGT, and CMGE zero comparison instructions
...
These can trivially use the ScalarCompare helper function.
2020-04-22 20:46:16 +01:00
Lioncash
3ad4e547e4
A64: Implement scalar variant of NEG
2020-04-22 20:46:16 +01:00
Lioncash
b4f3051e4b
simd: Relocate REV16, REV32 and REV64 vector variants to the proper file
...
These aren't scalar instruction variants.
2020-04-22 20:46:16 +01:00
Lioncash
19e276d10f
A64: Implement CMEQ (register, scalar)
2020-04-22 20:46:16 +01:00
Lioncash
5b8c9e5146
A64: Implement CMHS (register, scalar)
2020-04-22 20:46:16 +01:00
Lioncash
78bb12276a
A64: Implement CMHI (register, scalar)
2020-04-22 20:46:16 +01:00
Lioncash
c18b20b8d1
A64: Implement CMGE (register, scalar)
2020-04-22 20:46:16 +01:00
Lioncash
755981d0da
A64: Implement CMGT (register, scalar)
2020-04-22 20:46:16 +01:00
Lioncash
da6627124b
A64: Implement SHA1C
2020-04-22 20:46:16 +01:00
Lioncash
3c013bd9f8
A64: Implement SLI (scalar)
2020-04-22 20:46:16 +01:00
Lioncash
154cac594a
A64: Implement SRI (scalar)
2020-04-22 20:46:16 +01:00
Lioncash
205ca6b4cb
A64: Implement SHA1SU1
2020-04-22 20:46:16 +01:00
Lioncash
16a001b9ff
A64: Implement SHA1SU0
2020-04-22 20:46:16 +01:00
Lioncash
3b6db59850
A64: Implement TRN2
2020-04-22 20:46:16 +01:00
Lioncash
30e158f8d0
A64: Implement TRN1
2020-04-22 20:46:16 +01:00
Lioncash
52cad2d9d0
A64: Implement SSRA (scalar)
2020-04-22 20:46:16 +01:00
Lioncash
255a33936d
A64: Implement SSHR (scalar)
2020-04-22 20:46:16 +01:00
Lioncash
6723b00497
A64: Implement USRA (scalar)
2020-04-22 20:46:16 +01:00
Lioncash
d56fa8f735
A64: Implement USHR (scalar)
2020-04-22 20:46:16 +01:00
Lioncash
870e418b0b
A64: Implement SHL (scalar)
2020-04-22 20:46:16 +01:00
Lioncash
97f2bea4f2
A64: Implement SM3PARTW1
2020-04-22 20:46:16 +01:00
Lioncash
e268b110f0
simd_sha512: Simplify RAX1
...
Now that the vector rotation helpers are in, replace the explicit
shifting with the relevant helper function that does the same thing.
Simply tidies up code; no behavioral changes are made.
2020-04-22 20:46:16 +01:00
Lioncash
20d2491267
A64: Implement SM3PARTW2
2020-04-22 20:46:16 +01:00
Lioncash
8a60a63a8b
A64: Implement SM3TT2B
2020-04-22 20:46:16 +01:00
Lioncash
b3d4c02098
A64: Implement SM3TT2A
2020-04-22 20:46:16 +01:00
Lioncash
7fbccabd81
A64: Implement SM3TT1B
2020-04-22 20:46:16 +01:00
Lioncash
769373b3ed
A64: Implement SM3TT1A
2020-04-22 20:46:16 +01:00
Lioncash
2d269fdcc7
simd_shift_by_immediate: Merge signed/unsigned helper functions
...
Gets rid of a little more code duplication.
2020-04-22 20:46:16 +01:00
Lioncash
d5461be6b4
A64: Implement SM3SS1
2020-04-22 20:46:16 +01:00
Lioncash
2db032ac83
A64: Implement SRI (vector)
2020-04-22 20:46:16 +01:00
Lioncash
11005cfe26
A64: Implement SLI (vector)
2020-04-22 20:46:16 +01:00
Lioncash
e3d9bf55e7
A64: Implement SRSRA (vector)
2020-04-22 20:46:16 +01:00
Lioncash
bc6016cad7
A64: Implement SRSHR (vector)
2020-04-22 20:46:16 +01:00
Lioncash
a2f8cdf0a3
A64: Implement SSUBL/SSUBL2
2020-04-22 20:46:16 +01:00
Lioncash
d456fb85c8
A64: Implement SADDL/SADDL2
2020-04-22 20:46:16 +01:00
Lioncash
5c9e7f328d
A64: Implement USUBL/USUBL2
2020-04-22 20:46:16 +01:00
