MerryMage
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523ae542f4
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microinstruction: Implement HasAssociatedPseudoOperation
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2017-04-04 13:10:50 +01:00 |
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MerryMage
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05e97058c3
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parallel: Add and Subtract with Exchange improvements
* Remove asx argument from PackedHalvingSubAdd{U16,S16} IR instruction
* Implement Packed{Halving,}{AddSub,SubAdd}{U16,S16} IR instructions
* Implement SASX, SSAX, UASX, USAX
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2017-03-24 15:56:24 +00:00 |
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Lynn
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fd068ed6b8
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Ranged cache invalidation
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2017-03-20 11:58:25 +00:00 |
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MerryMage
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92a01b0cd8
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Prefer ASSERT to DEBUG_ASSERT
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2017-02-26 23:30:40 +00:00 |
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MerryMage
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bbeea72eba
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ir_opt: Remove redundant shift instructions
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2017-02-26 15:28:14 +00:00 |
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MerryMage
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4ed8ee7489
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microinstruction: Void arguments when invalidating instruction
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2017-02-18 21:29:23 +00:00 |
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MerryMage
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642ccb0f66
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ir/value: Support U16 immediates
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2017-01-29 22:58:11 +00:00 |
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MerryMage
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5f7ffe0d0b
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microinstruction: Implement Inst::AreAllArgsImmediates
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2017-01-29 22:56:59 +00:00 |
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MerryMage
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22804dc6a5
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microinstruction: Arguments of Inst::Use and Inst::UndoUse should be const
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2017-01-29 22:53:46 +00:00 |
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MerryMage
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1d4446cad5
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microinstruction: Removed unnecessary reference from argument of Inst::ReplaceUsesWith
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2017-01-29 22:52:33 +00:00 |
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MerryMage
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48693eb6ff
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Implement coprocessor-related microinstructions
* CoprocInternalOperation
* CoprocSendOneWord
* CoprocSendTwoWords
* CoprocGetOneWord
* CoprocGetTwoWords
* CoprocLoadWords
* CoprocStoreWords
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2017-01-08 14:56:06 +00:00 |
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MerryMage
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d8a37e287c
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IR: Add IR type CoprocInfo
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2017-01-08 14:56:06 +00:00 |
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MerryMage
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1efd3a764d
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IR: Remove unused microinstructions NegateLowWord and NegateHighWord
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2017-01-05 20:16:39 +00:00 |
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FernandoS27
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d5610eb26c
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Implement UHASX, UHSAX, SHASX and SHSAX (#75)
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2016-12-28 21:32:22 +00:00 |
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Fernando Sahmkow
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677f62dd6f
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Implement SHSUB8 and SHSUB16 (#74)
* Implement IR operations PackedHalvingSubS8 and PackedHalvingSubS16
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2016-12-22 12:02:24 +00:00 |
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MerryMage
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6a269a6ebd
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IR: Add microinstructions UnsignedSaturation and SignedSaturation
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2016-12-21 19:51:25 +00:00 |
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FernandoS27
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8919265d2c
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Implement SADD8, SADD16, SSUB8, SSUB16, USUB16
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2016-12-20 21:52:38 +00:00 |
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FernandoS27
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3f6ecfe245
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Implemented USAD8 and USADA8
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2016-12-20 21:52:38 +00:00 |
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MerryMage
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96e46ba6b5
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Implement QADD, QSUB, QDADD, QDSUB
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2016-12-15 22:34:29 +00:00 |
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MerryMage
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52e1445f43
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Implement USUB8
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2016-12-05 00:29:15 +00:00 |
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MerryMage
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5c1aab1666
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Implement CLZ
Includes tests
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2016-12-04 22:56:33 +00:00 |
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MerryMage
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1a1646d962
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Implement UADD8
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2016-12-04 20:52:33 +00:00 |
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MerryMage
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7cad6949e7
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IR: Implement new pseudo-operation GetGEFromOp
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2016-12-04 20:52:06 +00:00 |
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MerryMage
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e166965f3e
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Implement VCMP
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2016-12-03 11:41:09 +00:00 |
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MerryMage
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f2fe376fc6
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Support 64-bit immediates
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2016-12-03 11:29:50 +00:00 |
|
Mat M
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de1f831d79
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microinstruction: Make use_count private (#53)
Makes the operation a part of the direct interface.
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2016-11-30 21:51:06 +00:00 |
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Merry
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0ff8c375af
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Implement UHSUB8 and UHSUB16 (#48)
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2016-11-26 18:27:21 +00:00 |
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Merry
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cb17f9a3ed
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Implement SHADD8 and SHADD16 (#47)
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2016-11-26 18:12:29 +00:00 |
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MerryMage
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c0c1bb1094
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Implemented UHADD16
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2016-11-26 11:28:20 +00:00 |
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Yuri Kunde Schlesner
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9ec51f74bd
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libfmt: Update version to current master
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2016-11-25 20:47:04 +00:00 |
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Sebastian Valle
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4d44474ad4
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Implemented the ARM UHADD8 instruction. (#45)
The x64 implementation uses the SSSE3 instruction PSHUFB.
A non-SSE fallback is provided in case the CPU doesn't support it.
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2016-11-25 20:32:22 +00:00 |
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MerryMage
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b6f7b8babd
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ir: Implement GetGEFlags, SetGEFlags
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2016-11-23 19:44:27 +00:00 |
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Mat M
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6a2174ebfa
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Add missing explicit specifiers (#27)
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2016-09-07 12:08:48 +01:00 |
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Mat M
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6e0f27a500
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types: Add helpers for determining single and doubleword extension registers (#26)
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2016-09-07 12:08:35 +01:00 |
|
Mat M
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5bc9ce544f
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arm_types: Move into arm folder (#25)
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2016-09-06 00:52:33 +01:00 |
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Mat M
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b40d19c3b7
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location_descriptor: Provide operator<< string overload (#24)
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2016-09-05 21:31:25 +01:00 |
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Mat M
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6d53bb6d7e
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arm_types: Split out LocationDescriptor (#20)
This isn't really an ARM-specific type, since it's used to indicate a
Block location.
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2016-09-05 11:54:09 +01:00 |
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Mat M
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84336cf29d
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value: Change Value into a class (#19)
'struct' is a little bit of a misnomer, considering it has invariants
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2016-09-05 11:53:56 +01:00 |
|
Mat M
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858796a029
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Eliminate variable shadowing warnings with MSVC (#17)
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2016-09-04 11:30:57 +01:00 |
|
Mat M
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7f9a0c3c38
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Remove unnecessary explicit includes (#16)
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2016-09-03 21:48:03 +01:00 |
|
Mat M
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a465b2ddbc
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ir_emitter: Fix typo. ClearExlcusive -> ClearExclusive (#5)
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2016-09-02 12:17:22 +01:00 |
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MerryMage
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dca3b2f079
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Implement VMRS and VMSR
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2016-08-26 22:47:54 +01:00 |
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Lioncash
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0102951bdd
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Convert formatting over to fmtlib
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2016-08-26 13:13:19 +01:00 |
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MerryMage
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4322c0907c
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microinstruction: Rename FindUseWithOpcode to GetAssociatedPseudoOperation, encapsulate associated variables
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2016-08-25 21:08:47 +01:00 |
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MerryMage
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30df51c2dc
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ir_emitter: Should be in the IR namespace, not the Arm namespace
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2016-08-25 17:36:42 +01:00 |
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Lioncash
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0e12fb6a56
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basic_block: Move all variables behind a public interface
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2016-08-25 16:14:37 +01:00 |
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MerryMage
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dc26afbd7e
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translate_arm: Translate more than one conditional instruction in a block
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2016-08-25 13:05:33 +01:00 |
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MerryMage
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aa9b63bac4
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basic_block: DumpBlock now dumps terminal details
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2016-08-25 13:01:32 +01:00 |
|
Lioncash
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eba3a06d80
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frontend: Introduce FPSCR register helper class
Encapsulates all of the FPSCR state.
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2016-08-24 20:51:14 +01:00 |
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MerryMage
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b5a86889cd
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Implement VCVT
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2016-08-23 22:20:04 +01:00 |
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