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159 commits

Author SHA1 Message Date
MerryMage
a5bb81a97c backend_x64: Remove dispatch loop in Jit::Run 2017-04-08 10:04:53 +01:00
MerryMage
1b37420459 backend_x64: Simplify dispatcher 2017-04-08 09:35:45 +01:00
MerryMage
4c5de3905b emit_x64: Correct mutation of immutable in FPThreeOp{32,64} 
operand (args[1]) was erroneously declared as non-scratch.
operand's value could be modified if FTZ was enabled.
 2017-04-01 09:57:14 +01:00
MerryMage
05e97058c3 parallel: Add and Subtract with Exchange improvements 
* Remove asx argument from PackedHalvingSubAdd{U16,S16} IR instruction
* Implement Packed{Halving,}{AddSub,SubAdd}{U16,S16} IR instructions
* Implement SASX, SSAX, UASX, USAX
 2017-03-24 15:56:24 +00:00
Lynn
fd068ed6b8 Ranged cache invalidation 2017-03-20 11:58:25 +00:00
MerryMage
d9c69ad997 constant_pool: Implement a constant pool 2017-03-19 13:08:04 +00:00
MerryMage
184db36caf reg_alloc: Call DecrementRemainingUses in only one place 2017-02-26 23:30:38 +00:00
MerryMage
08a467bf9a emit_x64: Port to new register allocator interface 2017-02-26 23:12:25 +00:00
MerryMage
469bb6253f backend_x64: Factor EmitExclusiveWriteMemory64 into ExclusiveWrite 2017-02-26 15:34:26 +00:00
MerryMage
d7ab1f9c64 backend_x64: Fix ABI violation in ReadMemory and WriteMemory 
Caller-save registers were not saved before call instruction.

Refer to issue #98.
 2017-02-26 15:34:25 +00:00
MerryMage
bbeea72eba ir_opt: Remove redundant shift instructions 2017-02-26 15:28:14 +00:00
MerryMage
517fe0f18e emit_x64: WriteMemory* microinstructions do not define a value 2017-02-25 11:54:47 +00:00
MerryMage
058f7b5de6 emit_x64: Make EmitTerminal type-safe 
Avoid the use of boost::variant::which, which tends to produce code which
is not verifiable at compile-time.
 2017-02-16 19:40:51 +00:00
MerryMage
2af39dfaa8 emit_x64: Make reg_alloc a local variable 
reg_alloc contains state that is only valid on a per-block basis, so there
is no reason for it to be a member variable.
 2017-02-04 09:29:35 +00:00
MerryMage
2447f2f360 callbacks: Factorize memory callbacks into inner structure 2017-01-30 21:42:51 +00:00
MerryMage
9ecdd32b84 coprocessor: Implement fast-path for Coproc{Send,Get}{OneWord,TwoWords} 
Allow coprocessor interface to provide pointers instead of a callback.
This allows for a fastpath when all that is required is to read or write a
value and no other action needs to be taken.
 2017-01-08 14:56:06 +00:00
MerryMage
48693eb6ff Implement coprocessor-related microinstructions 
* CoprocInternalOperation
* CoprocSendOneWord
* CoprocSendTwoWords
* CoprocGetOneWord
* CoprocGetTwoWords
* CoprocLoadWords
* CoprocStoreWords
 2017-01-08 14:56:06 +00:00
MerryMage
1efd3a764d IR: Remove unused microinstructions NegateLowWord and NegateHighWord 2017-01-05 20:16:39 +00:00
FernandoS27
d5610eb26c Implement UHASX, UHSAX, SHASX and SHSAX (#75) 2016-12-28 21:32:22 +00:00
MerryMage
c7e5216473 emit_x64: EraseInstruction now also invalidates the instruction 
There is now no longer a need to call DecrementRemainingUses on the parent
instruction.
 2016-12-22 18:43:11 +00:00
Fernando Sahmkow
677f62dd6f Implement SHSUB8 and SHSUB16 (#74) 
* Implement IR operations PackedHalvingSubS8 and PackedHalvingSubS16
 2016-12-22 12:02:24 +00:00
MerryMage
6a269a6ebd IR: Add microinstructions UnsignedSaturation and SignedSaturation 2016-12-21 19:51:25 +00:00
MerryMage
02b2ab7581 emit_x64: Pass tmp to ExtractMostSignificantBitFromPackedBytes in EmitPackedAddU8 2016-12-20 22:07:51 +00:00
MerryMage
097f6a83da emit_x64: Document ExtractAndDuplicateMostSignificantBitFromPackedWords 2016-12-20 22:06:14 +00:00
MerryMage
03f168094d emit_x64: Document ExtractMostSignificantBitFromPackedBytes 2016-12-20 22:05:51 +00:00
FernandoS27
8919265d2c Implement SADD8, SADD16, SSUB8, SSUB16, USUB16 2016-12-20 21:52:38 +00:00
FernandoS27
3f6ecfe245 Implemented USAD8 and USADA8 2016-12-20 21:52:38 +00:00
MerryMage
b1d3e7aae9 emit_x64: Refactor patching code 
* Only have a single std::unordered_map for patching information
* Factor patch emitters into own functions
* Implement EmitX64::Unpatch
 2016-12-20 14:06:55 +00:00
MerryMage
96e46ba6b5 Implement QADD, QSUB, QDADD, QDSUB 2016-12-15 22:34:29 +00:00
MerryMage
63caed7b09 emit_x64: Remove argument names of unused arguments 2016-12-15 20:52:22 +00:00
Lioncash
f467589346 emit_x64: Remove unnecessary casts 2016-12-05 20:30:19 +00:00
Lioncash
a37631c010 emit_x64: Use reinterpret_cast for pointer casts 2016-12-05 20:30:19 +00:00
Lioncash
fafa845f64 emit_x64: Make GetBasicBlock() const qualified 2016-12-05 12:46:22 +00:00
Lioncash
6a16edc0fb emit_x64: Move implementations into the cpp file 
Prevents needing to rebuild everything including the emitter if any
details ever change.
 2016-12-05 12:46:22 +00:00
Lioncash
282029f60a emit_x64: Forward declare BlockOfCode 2016-12-05 12:46:22 +00:00
Lioncash
6898b74c78 emit_x64: Get rid of indirect includes 2016-12-05 12:46:22 +00:00
MerryMage
54d051977f emit_x64: Use movdqa instead of movaps in EmitPackedSubU8 
While movaps and movdqa are behaviourly equivalent, using movaps may incur
a domain crossing penalty on some microarchitectures. This is because
movaps is an instruction in the floating-point domain while the following
instructions are in the integer domain.
 2016-12-05 01:00:51 +00:00
MerryMage
52e1445f43 Implement USUB8 2016-12-05 00:29:15 +00:00
MerryMage
5c1aab1666 Implement CLZ 
Includes tests
 2016-12-04 22:56:33 +00:00
MerryMage
1a1646d962 Implement UADD8 2016-12-04 20:52:33 +00:00
MerryMage
7cad6949e7 IR: Implement new pseudo-operation GetGEFromOp 2016-12-04 20:52:06 +00:00
MerryMage
25f21b5371 emit_x64: Inline nzcv computation into EmitFPCompare32 and EmitFPCompare64 2016-12-04 11:43:31 +00:00
MerryMage
cede5e442a emit_x64: Use xorps/xorpd when argument to TransferToFP32/TransferToFP64 is an immediate zero 2016-12-03 11:41:10 +00:00
MerryMage
e166965f3e Implement VCMP 2016-12-03 11:41:09 +00:00
Mat M
de1f831d79 microinstruction: Make use_count private (#53) 
Makes the operation a part of the direct interface.
 2016-11-30 21:51:06 +00:00
Sebastian Valle
14eb70d7e4 VFP: Fixed the VCVT behavior when converting from unsigned 32-bit values. (#51) 
Use a 64-bit register to hold the values so that we don't end up interpreting them as signed values.
 2016-11-27 23:25:50 +00:00
Merry
0ff8c375af Implement UHSUB8 and UHSUB16 (#48) 2016-11-26 18:27:21 +00:00
Merry
cb17f9a3ed Implement SHADD8 and SHADD16 (#47) 2016-11-26 18:12:29 +00:00
MerryMage
c0c1bb1094 Implemented UHADD16 2016-11-26 11:28:20 +00:00
Sebastian Valle
4d44474ad4 Implemented the ARM UHADD8 instruction. (#45) 
The x64 implementation uses the SSSE3 instruction PSHUFB.
A non-SSE fallback is provided in case the CPU doesn't support it.
 2016-11-25 20:32:22 +00:00