Tillmann Karras
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fc33f1d374
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Implement more instructions
SXTB, SXTH, SXTAB, SXTAH, UXTB, UXTH, UXTAB, UXTAH, REV16
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2016-08-03 00:47:17 +01:00 |
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Tillmann Karras
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30a90295b9
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Implement data processing instructions
ADC, ADD, AND, BIC, CMN, CMP, EOR, MOV, MVN, ORR, RSB, RSC, SBC, SUB,
TEQ, TST
The code could use some serious deduplication...
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2016-08-03 00:47:16 +01:00 |
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Subv
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ccc61472b9
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Added format strings for ARM STRBT encodings A1 and A2
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2016-07-18 14:20:58 -05:00 |
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Subv
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8617bf80a1
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Added format strings for ARM LDRBT encodings A1 and A2
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2016-07-18 14:18:39 -05:00 |
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Subv
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5d5ea9325c
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Added format strings for ARM STRT encodings A1 and A2
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2016-07-18 14:05:53 -05:00 |
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Subv
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77761ba032
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Added the format strings for LDRT encodings A1 and A2.
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2016-07-18 14:01:18 -05:00 |
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MerryMage
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c18a3eeab4
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Better MSVC support
* Avoiding use of templated variables.
* Now compling on MSVC with /WX (warnings as errors).
* Fixed all MSVC warnings.
* Fixed MSVC source_groups.
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2016-07-18 10:38:22 +01:00 |
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Subv
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0cdf5fe751
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Implemented ARM REV and REVSH instructions, with tests.
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2016-07-17 14:45:42 -05:00 |
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Subv
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7f09510945
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Implemented ARM CMP (imm) instruction.
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2016-07-17 13:29:37 -05:00 |
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MerryMage
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4b1c27e64f
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Implement arm_ADC_imm
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2016-07-14 20:02:41 +01:00 |
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MerryMage
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9b2aff166a
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Implement arm_SVC
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2016-07-14 14:29:46 +01:00 |
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MerryMage
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672ffb93d0
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frontend/translator: Skeleton for Arm translator
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2016-07-14 13:28:20 +01:00 |
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MerryMage
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d743adf518
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Reorganisation, Import Skyeye, This is a mess
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2016-07-04 17:22:11 +08:00 |
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