295 lines
6.1 KiB
C++
295 lines
6.1 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include "common/assert.h"
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#include "frontend/ir/microinstruction.h"
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namespace Dynarmic {
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namespace IR {
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bool Inst::IsArithmeticShift() const {
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return op == Opcode::ArithmeticShiftRight;
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}
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bool Inst::IsCircularShift() const {
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return op == Opcode::RotateRight ||
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op == Opcode::RotateRightExtended;
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}
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bool Inst::IsLogicalShift() const {
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switch (op) {
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case Opcode::LogicalShiftLeft:
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case Opcode::LogicalShiftRight:
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case Opcode::LogicalShiftRight64:
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return true;
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default:
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return false;
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}
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}
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bool Inst::IsShift() const {
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return IsArithmeticShift() ||
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IsCircularShift() ||
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IsLogicalShift();
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}
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bool Inst::IsSharedMemoryRead() const {
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switch (op) {
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case Opcode::ReadMemory8:
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case Opcode::ReadMemory16:
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case Opcode::ReadMemory32:
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case Opcode::ReadMemory64:
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return true;
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default:
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return false;
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}
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}
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bool Inst::IsSharedMemoryWrite() const {
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switch (op) {
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case Opcode::WriteMemory8:
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case Opcode::WriteMemory16:
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case Opcode::WriteMemory32:
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case Opcode::WriteMemory64:
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return true;
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default:
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return false;
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}
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}
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bool Inst::IsSharedMemoryReadOrWrite() const {
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return IsSharedMemoryRead() || IsSharedMemoryWrite();
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}
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bool Inst::IsExclusiveMemoryWrite() const {
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switch (op) {
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case Opcode::ExclusiveWriteMemory8:
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case Opcode::ExclusiveWriteMemory16:
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case Opcode::ExclusiveWriteMemory32:
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case Opcode::ExclusiveWriteMemory64:
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return true;
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default:
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return false;
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}
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}
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bool Inst::IsMemoryRead() const {
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return IsSharedMemoryRead();
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}
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bool Inst::IsMemoryWrite() const {
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return IsSharedMemoryWrite() || IsExclusiveMemoryWrite();
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}
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bool Inst::IsMemoryReadOrWrite() const {
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return IsMemoryRead() || IsMemoryWrite();
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}
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bool Inst::ReadsFromCPSR() const {
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switch (op) {
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case Opcode::GetCpsr:
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case Opcode::GetNFlag:
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case Opcode::GetZFlag:
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case Opcode::GetCFlag:
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case Opcode::GetVFlag:
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return true;
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default:
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return false;
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}
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}
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bool Inst::WritesToCPSR() const {
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switch (op) {
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case Opcode::SetCpsr:
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case Opcode::SetNFlag:
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case Opcode::SetZFlag:
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case Opcode::SetCFlag:
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case Opcode::SetVFlag:
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case Opcode::OrQFlag:
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return true;
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default:
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return false;
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}
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}
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bool Inst::ReadsFromCoreRegister() const {
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switch (op) {
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case Opcode::GetRegister:
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case Opcode::GetExtendedRegister32:
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case Opcode::GetExtendedRegister64:
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return true;
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default:
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return false;
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}
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}
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bool Inst::WritesToCoreRegister() const {
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switch (op) {
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case Opcode::SetRegister:
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case Opcode::SetExtendedRegister32:
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case Opcode::SetExtendedRegister64:
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case Opcode::BXWritePC:
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return true;
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default:
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return false;
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}
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}
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bool Inst::ReadsFromFPSCR() const {
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switch (op) {
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case Opcode::FPAbs32:
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case Opcode::FPAbs64:
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case Opcode::FPAdd32:
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case Opcode::FPAdd64:
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case Opcode::FPDiv32:
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case Opcode::FPDiv64:
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case Opcode::FPMul32:
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case Opcode::FPMul64:
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case Opcode::FPNeg32:
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case Opcode::FPNeg64:
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case Opcode::FPSqrt32:
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case Opcode::FPSqrt64:
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case Opcode::FPSub32:
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case Opcode::FPSub64:
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return true;
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default:
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return false;
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}
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}
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bool Inst::WritesToFPSCR() const {
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switch (op) {
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case Opcode::FPAbs32:
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case Opcode::FPAbs64:
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case Opcode::FPAdd32:
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case Opcode::FPAdd64:
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case Opcode::FPDiv32:
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case Opcode::FPDiv64:
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case Opcode::FPMul32:
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case Opcode::FPMul64:
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case Opcode::FPNeg32:
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case Opcode::FPNeg64:
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case Opcode::FPSqrt32:
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case Opcode::FPSqrt64:
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case Opcode::FPSub32:
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case Opcode::FPSub64:
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return true;
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default:
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return false;
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}
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}
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bool Inst::CausesCPUException() const {
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return op == Opcode::Breakpoint ||
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op == Opcode::CallSupervisor;
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}
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bool Inst::AltersExclusiveState() const {
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return op == Opcode::ClearExclusive ||
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op == Opcode::SetExclusive ||
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IsExclusiveMemoryWrite();
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}
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bool Inst::MayHaveSideEffects() const {
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return op == Opcode::PushRSB ||
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CausesCPUException() ||
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WritesToCoreRegister() ||
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WritesToCPSR() ||
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WritesToFPSCR() ||
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AltersExclusiveState() ||
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IsMemoryWrite();
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}
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Type Inst::GetType() const {
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if (op == Opcode::Identity)
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return args[0].GetType();
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return GetTypeOf(op);
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}
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Value Inst::GetArg(size_t index) const {
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DEBUG_ASSERT(index < GetNumArgsOf(op));
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DEBUG_ASSERT(!args[index].IsEmpty());
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return args[index];
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}
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void Inst::SetArg(size_t index, Value value) {
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DEBUG_ASSERT(index < GetNumArgsOf(op));
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DEBUG_ASSERT(AreTypesCompatible(value.GetType(), GetArgTypeOf(op, index)));
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if (!args[index].IsImmediate()) {
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UndoUse(args[index]);
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}
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if (!value.IsImmediate()) {
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Use(value);
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}
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args[index] = value;
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}
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void Inst::Invalidate() {
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for (auto& value : args) {
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if (!value.IsImmediate()) {
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UndoUse(value);
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}
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}
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}
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void Inst::ReplaceUsesWith(Value& replacement) {
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Invalidate();
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op = Opcode::Identity;
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if (!replacement.IsImmediate()) {
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Use(replacement);
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}
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args[0] = replacement;
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}
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void Inst::Use(Value& value) {
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value.GetInst()->use_count++;
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switch (op){
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case Opcode::GetCarryFromOp:
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value.GetInst()->carry_inst = this;
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break;
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case Opcode::GetOverflowFromOp:
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value.GetInst()->overflow_inst = this;
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break;
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default:
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break;
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}
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}
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void Inst::UndoUse(Value& value) {
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value.GetInst()->use_count--;
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switch (op){
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case Opcode::GetCarryFromOp:
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value.GetInst()->carry_inst = nullptr;
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break;
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case Opcode::GetOverflowFromOp:
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value.GetInst()->overflow_inst = nullptr;
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break;
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default:
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break;
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}
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}
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} // namespace IR
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} // namespace Dynarmic
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