166 lines
8.9 KiB
C++
166 lines
8.9 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#pragma once
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#include <array>
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#include <functional>
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#include <tuple>
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#include <boost/optional.hpp>
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#include "common/common_types.h"
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#include "frontend/decoder/decoder_detail.h"
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namespace Dynarmic {
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namespace Arm {
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template <typename Visitor>
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struct Thumb16Matcher {
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using CallRetT = typename mp::MemFnInfo<decltype(&Visitor::thumb16_UDF), &Visitor::thumb16_UDF>::return_type;
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Thumb16Matcher(const char* const name, u16 mask, u16 expect, std::function<CallRetT(Visitor&, u16)> fn)
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: name(name), mask(mask), expect(expect), fn(fn) {}
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/// Gets the name of this type of instruction.
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const char* GetName() const {
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return name;
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}
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/**
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* Tests to see if the instruction is this type of instruction.
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* @param instruction The instruction to test
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* @returns true if the instruction is
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*/
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bool Matches(u16 instruction) const {
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return (instruction & mask) == expect;
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}
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/**
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* Calls the corresponding instruction handler on visitor for this type of instruction.
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* @param v The visitor to use
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* @param instruction The instruction to decode.
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*/
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CallRetT call(Visitor& v, u16 instruction) const {
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assert(Matches(instruction));
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return fn(v, instruction);
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}
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private:
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const char* name;
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u16 mask, expect;
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std::function<CallRetT(Visitor&, u16)> fn;
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};
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template <typename V>
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const std::array<Thumb16Matcher<V>, 36> g_thumb16_instruction_table = {
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#define INST(fn, name, bitstring) detail::detail<Thumb16Matcher, u16, 16>::GetMatcher<decltype(fn), fn>(name, bitstring)
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// Shift (immediate), add, subtract, move and compare instructions
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INST(&V::thumb16_LSL_imm, "LSL (imm)", "00000vvvvvmmmddd"),
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INST(&V::thumb16_LSR_imm, "LSR (imm)", "00001vvvvvmmmddd"),
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INST(&V::thumb16_ASR_imm, "ASR (imm)", "00010vvvvvmmmddd"),
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INST(&V::thumb16_ADD_reg_t1, "ADD (reg, T1)", "0001100mmmnnnddd"),
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INST(&V::thumb16_SUB_reg, "SUB (reg)", "0001101mmmnnnddd"),
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INST(&V::thumb16_ADD_imm_t1, "ADD (imm, T1)", "0001110vvvnnnddd"),
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INST(&V::thumb16_SUB_imm_t1, "SUB (imm, T1)", "0001111vvvnnnddd"),
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INST(&V::thumb16_MOV_imm, "MOV (imm)", "00100dddvvvvvvvv"),
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INST(&V::thumb16_CMP_imm, "CMP (imm)", "00101nnnvvvvvvvv"),
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INST(&V::thumb16_ADD_imm_t2, "ADD (imm, T2)", "00110dddvvvvvvvv"),
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INST(&V::thumb16_SUB_imm_t2, "SUB (imm, T2)", "00111dddvvvvvvvv"),
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// Data-processing instructions
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INST(&V::thumb16_AND_reg, "AND (reg)", "0100000000mmmddd"),
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INST(&V::thumb16_EOR_reg, "EOR (reg)", "0100000001mmmddd"),
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INST(&V::thumb16_LSL_reg, "LSL (reg)", "0100000010mmmddd"),
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INST(&V::thumb16_LSR_reg, "LSR (reg)", "0100000011mmmddd"),
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INST(&V::thumb16_ASR_reg, "ASR (reg)", "0100000100mmmddd"),
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INST(&V::thumb16_ADC_reg, "ADC (reg)", "0100000101mmmddd"),
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INST(&V::thumb16_SBC_reg, "SBC (reg)", "0100000110mmmddd"),
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INST(&V::thumb16_ROR_reg, "ROR (reg)", "0100000111sssddd"),
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INST(&V::thumb16_TST_reg, "TST (reg)", "0100001000mmmnnn"),
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INST(&V::thumb16_RSB_imm, "RSB (imm)", "0100001001nnnddd"),
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INST(&V::thumb16_CMP_reg_t1, "CMP (reg, T1)", "0100001010mmmnnn"),
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INST(&V::thumb16_CMN_reg, "CMN (reg)", "0100001011mmmnnn"),
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INST(&V::thumb16_ORR_reg, "ORR (reg)", "0100001100mmmddd"),
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//INST(&V::thumb16_MULS_rr, "MULS (rr)", "0100001101mmmddd"),
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INST(&V::thumb16_BIC_reg, "BIC (reg)", "0100001110mmmddd"),
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INST(&V::thumb16_MVN_reg, "MVN (reg)", "0100001111mmmddd"),
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// Special data instructions
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INST(&V::thumb16_ADD_reg_t2, "ADD (reg, T2)", "01000100Dmmmmddd"), // v4T, Low regs: v6T2
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INST(&V::thumb16_CMP_reg_t2, "CMP (reg, T2)", "01000101Nmmmmnnn"), // v4T
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INST(&V::thumb16_MOV_reg, "MOV (reg)", "01000110Dmmmmddd"), // v4T, Low regs: v6
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// Store/Load single data item instructions
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INST(&V::thumb16_LDR_literal, "LDR (literal)", "01001tttvvvvvvvv"),
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INST(&V::thumb16_STR_reg, "STR (reg)", "0101000mmmnnnttt"),
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INST(&V::thumb16_STRH_reg, "STRH (reg)", "0101001mmmnnnttt"),
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INST(&V::thumb16_STRB_reg, "STRB (reg)", "0101010mmmnnnttt"),
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//INST(&V::thumb16_LDRSB_rrr, "LDRSB (rrr)", "0101011mmmnnnddd"),
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//INST(&V::thumb16_LDR_rrr, "LDR (rrr)", "0101100mmmnnnddd"),
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//INST(&V::thumb16_LDRH_rrr, "LDRH (rrr)", "0101101mmmnnnddd"),
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//INST(&V::thumb16_LDRB_rrr, "LDRB (rrr)", "0101110mmmnnnddd"),
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//INST(&V::thumb16_LDRSH_rrr, "LDRSH (rrr)", "0101111mmmnnnddd"),
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INST(&V::thumb16_LDR_imm_t1, "LDR (imm, T1)", "01101vvvvvnnnttt"),
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//INST(&V::thumb16_STRH_rri, "STRH (rri)", "10000vvvvvnnnddd"),
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//INST(&V::thumb16_LDRH_rri, "LDRH (rri)", "10001vvvvvnnnddd"),
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//INST(&V::thumb16_STR_sp, "STR (SP)", "10010dddvvvvvvvv"),
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//INST(&V::thumb16_LDR_sp, "LDR (SP)", "10011dddvvvvvvvv"),
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// Generate relative address instruction
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//INST(&V::thumb16_ADR, "ADR", "10100dddvvvvvvvv"),
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//INST(&V::thumb16_ADD_sp, "ADD (relative to SP)", "10101dddvvvvvvvv"),
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// Miscellaneous 16-bit instructions
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//INST(&V::thumb16_ADD_spsp, "ADD (imm to SP)", "101100000vvvvvvv"), // v4T
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//INST(&V::thumb16_SUB_spsp, "SUB (imm from SP)", "101100001vvvvvvv"), // v4T
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//INST(&V::thumb16_SXTH, "SXTH", "1011001000mmmddd"), // v6
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//INST(&V::thumb16_SXTB, "SXTB", "1011001001mmmddd"), // v6
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//INST(&V::thumb16_UXTH, "UXTH", "1011001010mmmddd"), // v6
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//INST(&V::thumb16_UXTB, "UXTB", "1011001011mmmddd"), // v6
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//INST(&V::thumb16_PUSH, "PUSH", "1011010rxxxxxxxx"), // v4T
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//INST(&V::thumb16_POP, "POP", "1011110rxxxxxxxx"), // v4T
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//INST(&V::thumb16_SETEND, "SETEND", "101101100101x000"), // v6
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//INST(&V::thumb16_CPS, "CPS", "10110110011m0aif"), // v6
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//INST(&V::thumb16_REV, "REV", "1011101000nnnddd"), // v6
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//INST(&V::thumb16_REV16, "REV16", "1011101001nnnddd"), // v6
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//INST(&V::thumb16_REVSH, "REVSH", "1011101011nnnddd"), // v6
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//INST(&V::thumb16_BKPT, "BKPT", "10111110xxxxxxxx"), // v5
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// Store/Load multiple registers
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//INST(&V::thumb16_STMIA, "STMIA", "11000nnnxxxxxxxx"),
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//INST(&V::thumb16_LDMIA, "LDMIA", "11001nnnxxxxxxxx"),
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// Branch instructions
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//INST(&V::thumb16_BX, "BX (reg)", "010001110mmmm000"), // v4T
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//INST(&V::thumb16_BLX, "BLX (reg)", "010001111mmmm000"), // v5T
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INST(&V::thumb16_UDF, "UDF", "11011110--------"),
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INST(&V::thumb16_SVC, "SVC", "11011111xxxxxxxx"),
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//INST(&V::thumb16_B_cond, "B (cond)", "1101ccccxxxxxxxx"),
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//INST(&V::thumb16_B_imm, "B (imm)", "11100xxxxxxxxxxx"),
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//INST(&V::thumb16_BLX_suffix, "BLX (imm, suffix)", "11101xxxxxxxxxx0"),
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//INST(&V::thumb16_BLX_prefix, "BL/BLX (imm, prefix)", "11110xxxxxxxxxxx"),
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//INST(&V::thumb16_BL_suffix, "BL (imm, suffix)", "11111xxxxxxxxxxx"),
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#undef INST
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};
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template<typename Visitor>
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boost::optional<const Thumb16Matcher<Visitor>&> DecodeThumb16(u16 instruction) {
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const auto& table = g_thumb16_instruction_table<Visitor>;
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auto matches_instruction = [instruction](const auto& matcher){ return matcher.Matches(instruction); };
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assert(std::count_if(table.begin(), table.end(), matches_instruction) <= 1);
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auto iter = std::find_if(table.begin(), table.end(), matches_instruction);
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return iter != table.end() ? boost::make_optional<const Thumb16Matcher<Visitor>&>(*iter) : boost::none;
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}
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} // namespace Arm
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} // namespace Dynarmic
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