From 0f4bf26e054d15dd1658d6eb52d0a7ccf53f0152 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 7 Jul 2018 14:54:44 -0400 Subject: [PATCH] simd_two_register_misc: Utilize FPVectorAbs in FABS implementations Since we already have opcodes introduced to implement FACGE and FACGT, we can reutilize it for the FABS implementations. --- .../A64/translate/impl/simd_two_register_misc.cpp | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/src/frontend/A64/translate/impl/simd_two_register_misc.cpp b/src/frontend/A64/translate/impl/simd_two_register_misc.cpp index 9719d865..f260d363 100644 --- a/src/frontend/A64/translate/impl/simd_two_register_misc.cpp +++ b/src/frontend/A64/translate/impl/simd_two_register_misc.cpp @@ -148,10 +148,10 @@ bool TranslatorVisitor::XTN(bool Q, Imm<2> size, Vec Vn, Vec Vd) { bool TranslatorVisitor::FABS_1(bool Q, Vec Vn, Vec Vd) { const size_t datasize = Q ? 128 : 64; + const size_t esize = 16; const IR::U128 operand = V(datasize, Vn); - const IR::U128 mask = ir.VectorBroadcast(64, I(64, 0x7FFF7FFF7FFF7FFF)); - const IR::U128 result = ir.VectorAnd(operand, mask); + const IR::U128 result = ir.FPVectorAbs(esize, operand); V(datasize, Vd, result); return true; @@ -164,11 +164,9 @@ bool TranslatorVisitor::FABS_2(bool Q, bool sz, Vec Vn, Vec Vd) { const size_t datasize = Q ? 128 : 64; const size_t esize = sz ? 64 : 32; - const size_t mask_value = sz ? 0x7FFFFFFFFFFFFFFF : 0x7FFFFFFF; const IR::U128 operand = V(datasize, Vn); - const IR::U128 mask = ir.VectorBroadcast(esize, I(esize, mask_value)); - const IR::U128 result = ir.VectorAnd(operand, mask); + const IR::U128 result = ir.FPVectorAbs(esize, operand); V(datasize, Vd, result); return true;