diff --git a/src/frontend/A32/decoder/thumb32.inc b/src/frontend/A32/decoder/thumb32.inc
index b4f21d61..1dfb48c5 100644
--- a/src/frontend/A32/decoder/thumb32.inc
+++ b/src/frontend/A32/decoder/thumb32.inc
@@ -265,7 +265,7 @@ INST(thumb32_MUL,            "MUL",                      "111110110000nnnn1111dd
 INST(thumb32_MLA,            "MLA",                      "111110110000nnnnaaaadddd0000mmmm")
 INST(thumb32_MLS,            "MLS",                      "111110110000nnnnaaaadddd0001mmmm")
 INST(thumb32_SMULXY,         "SMULXY",                   "111110110001nnnn1111dddd00NMmmmm")
-//INST(thumb32_SMLAXY,         "SMLAXY",                   "111110110001------------00------")
+INST(thumb32_SMLAXY,         "SMLAXY",                   "111110110001nnnnaaaadddd00NMmmmm")
 //INST(thumb32_SMUAD,          "SMUAD",                    "111110110010----1111----000-----")
 //INST(thumb32_SMLAD,          "SMLAD",                    "111110110010------------000-----")
 //INST(thumb32_SMULWY,         "SMULWY",                   "111110110011----1111----000-----")
diff --git a/src/frontend/A32/translate/impl/thumb32_multiply.cpp b/src/frontend/A32/translate/impl/thumb32_multiply.cpp
index b83493e6..e34c5780 100644
--- a/src/frontend/A32/translate/impl/thumb32_multiply.cpp
+++ b/src/frontend/A32/translate/impl/thumb32_multiply.cpp
@@ -8,7 +8,7 @@
 namespace Dynarmic::A32 {
 
 bool ThumbTranslatorVisitor::thumb32_MLA(Reg n, Reg a, Reg d, Reg m) {
-    if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
+    if (d == Reg::PC || n == Reg::PC || m == Reg::PC || a == Reg::PC) {
         return UnpredictableInstruction();
     }
 
@@ -22,7 +22,7 @@ bool ThumbTranslatorVisitor::thumb32_MLA(Reg n, Reg a, Reg d, Reg m) {
 }
 
 bool ThumbTranslatorVisitor::thumb32_MLS(Reg n, Reg a, Reg d, Reg m) {
-    if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
+    if (d == Reg::PC || n == Reg::PC || m == Reg::PC || a == Reg::PC) {
         return UnpredictableInstruction();
     }
 
@@ -48,6 +48,25 @@ bool ThumbTranslatorVisitor::thumb32_MUL(Reg n, Reg d, Reg m) {
     return true;
 }
 
+bool ThumbTranslatorVisitor::thumb32_SMLAXY(Reg n, Reg a, Reg d, bool N, bool M, Reg m) {
+    if (d == Reg::PC || n == Reg::PC || m == Reg::PC || a == Reg::PC) {
+        return UnpredictableInstruction();
+    }
+
+    const IR::U32 n32 = ir.GetRegister(n);
+    const IR::U32 m32 = ir.GetRegister(m);
+    const IR::U32 n16 = N ? ir.ArithmeticShiftRight(n32, ir.Imm8(16), ir.Imm1(0)).result
+                          : ir.SignExtendHalfToWord(ir.LeastSignificantHalf(n32));
+    const IR::U32 m16 = M ? ir.ArithmeticShiftRight(m32, ir.Imm8(16), ir.Imm1(0)).result
+                          : ir.SignExtendHalfToWord(ir.LeastSignificantHalf(m32));
+    const IR::U32 product = ir.Mul(n16, m16);
+    const auto result_overflow = ir.AddWithCarry(product, ir.GetRegister(a), ir.Imm1(0));
+
+    ir.SetRegister(d, result_overflow.result);
+    ir.OrQFlag(result_overflow.overflow);
+    return true;
+}
+
 bool ThumbTranslatorVisitor::thumb32_SMULXY(Reg n, Reg d, bool N, bool M, Reg m) {
     if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
         return UnpredictableInstruction();
@@ -79,7 +98,7 @@ bool ThumbTranslatorVisitor::thumb32_USAD8(Reg n, Reg d, Reg m) {
 }
 
 bool ThumbTranslatorVisitor::thumb32_USADA8(Reg n, Reg a, Reg d, Reg m) {
-    if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
+    if (d == Reg::PC || n == Reg::PC || m == Reg::PC || a == Reg::PC) {
         return UnpredictableInstruction();
     }
 
diff --git a/src/frontend/A32/translate/impl/translate_thumb.h b/src/frontend/A32/translate/impl/translate_thumb.h
index 3cd40693..86fce434 100644
--- a/src/frontend/A32/translate/impl/translate_thumb.h
+++ b/src/frontend/A32/translate/impl/translate_thumb.h
@@ -132,6 +132,7 @@ struct ThumbTranslatorVisitor final {
     bool thumb32_MLA(Reg n, Reg a, Reg d, Reg m);
     bool thumb32_MLS(Reg n, Reg a, Reg d, Reg m);
     bool thumb32_MUL(Reg n, Reg d, Reg m);
+    bool thumb32_SMLAXY(Reg n, Reg a, Reg d, bool N, bool M, Reg m);
     bool thumb32_SMULXY(Reg n, Reg d, bool N, bool M, Reg m);
     bool thumb32_USAD8(Reg n, Reg d, Reg m);
     bool thumb32_USADA8(Reg n, Reg a, Reg d, Reg m);