From 1fb0957aa39bda226cdc0dfa33c36a8ca511c7ed Mon Sep 17 00:00:00 2001 From: MerryMage Date: Sat, 3 Feb 2018 01:23:11 +0000 Subject: [PATCH] A64: Implement FCVT --- src/frontend/A64/decoder/a64.inc | 2 +- ...ing_point_data_processing_one_register.cpp | 48 +++++++++++++++++++ 2 files changed, 49 insertions(+), 1 deletion(-) diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc index 4c6b4445..871f8073 100644 --- a/src/frontend/A64/decoder/a64.inc +++ b/src/frontend/A64/decoder/a64.inc @@ -919,7 +919,7 @@ INST(EOR_asimd, "EOR (vector)", "0Q101 //INST(FABS_float, "FABS (scalar)", "00011110yy100000110000nnnnnddddd") //INST(FNEG_float, "FNEG (scalar)", "00011110yy100001010000nnnnnddddd") //INST(FSQRT_float, "FSQRT (scalar)", "00011110yy100001110000nnnnnddddd") -//INST(FCVT_float, "FCVT", "00011110yy10001oo10000nnnnnddddd") +INST(FCVT_float, "FCVT", "00011110yy10001oo10000nnnnnddddd") //INST(FRINTN_float, "FRINTN (scalar)", "00011110yy100100010000nnnnnddddd") //INST(FRINTP_float, "FRINTP (scalar)", "00011110yy100100110000nnnnnddddd") //INST(FRINTM_float, "FRINTM (scalar)", "00011110yy100101010000nnnnnddddd") diff --git a/src/frontend/A64/translate/impl/floating_point_data_processing_one_register.cpp b/src/frontend/A64/translate/impl/floating_point_data_processing_one_register.cpp index c38187d3..8066aa29 100644 --- a/src/frontend/A64/translate/impl/floating_point_data_processing_one_register.cpp +++ b/src/frontend/A64/translate/impl/floating_point_data_processing_one_register.cpp @@ -56,4 +56,52 @@ bool TranslatorVisitor::FMOV_float_imm(Imm<2> type, Imm<8> imm8, Vec Vd) { return true; } +bool TranslatorVisitor::FCVT_float(Imm<2> type, Imm<2> opc, Vec Vn, Vec Vd) { + if (type == opc) { + return UnallocatedEncoding(); + } + + boost::optional srcsize = GetDataSize(type); + boost::optional dstsize = GetDataSize(opc); + + if (!srcsize || !dstsize) { + return UnallocatedEncoding(); + } + + IR::UAny operand = V_scalar(*srcsize, Vn); + IR::UAny result; + switch (*srcsize) { + case 16: + switch (*dstsize) { + case 32: + return InterpretThisInstruction(); + case 64: + return InterpretThisInstruction(); + } + break; + case 32: + switch (*dstsize) { + case 16: + return InterpretThisInstruction(); + case 64: + result = ir.FPSingleToDouble(operand, true); + break; + } + break; + case 64: + switch (*dstsize) { + case 16: + return InterpretThisInstruction(); + case 32: + result = ir.FPDoubleToSingle(operand, true); + break; + } + break; + } + + V_scalar(*dstsize, Vd, result); + + return true; +} + } // namespace Dynarmic::A64