diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index a96500ea..15e2d083 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -124,6 +124,7 @@ if ("A32" IN_LIST DYNARMIC_FRONTENDS) frontend/A32/location_descriptor.h frontend/A32/PSR.h frontend/A32/translate/impl/asimd_load_store_structures.cpp + frontend/A32/translate/impl/asimd_misc.cpp frontend/A32/translate/impl/asimd_one_reg_modified_immediate.cpp frontend/A32/translate/impl/asimd_three_same.cpp frontend/A32/translate/impl/asimd_two_regs_misc.cpp diff --git a/src/frontend/A32/decoder/asimd.inc b/src/frontend/A32/decoder/asimd.inc index 29fac264..c6a8e0de 100644 --- a/src/frontend/A32/decoder/asimd.inc +++ b/src/frontend/A32/decoder/asimd.inc @@ -108,7 +108,7 @@ INST(asimd_VRSQRTE, "VRSQRTE", "111100111D11zz11dddd010 //INST(asimd_VCVT_integer, "VCVT (integer)", "111100111-11--11----011xxx-0----") // ASIMD // Miscellaneous -//INST(asimd_VEXT, "VEXT", "111100101D11nnnnddddiiiiNQM0mmmm") // ASIMD +INST(asimd_VEXT, "VEXT", "111100101D11nnnnddddiiiiNQM0mmmm") // ASIMD //INST(asimd_VTBL, "VTBL", "111100111D11nnnndddd10zzN0M0mmmm") // ASIMD //INST(asimd_VTBX, "VTBX", "111100111D11nnnndddd10zzN1M0mmmm") // ASIMD //INST(asimd_VDUP_scalar, "VDUP (scalar)", "111100111D11iiiidddd11000QM0mmmm") // ASIMD diff --git a/src/frontend/A32/translate/impl/asimd_misc.cpp b/src/frontend/A32/translate/impl/asimd_misc.cpp new file mode 100644 index 00000000..6e7fede9 --- /dev/null +++ b/src/frontend/A32/translate/impl/asimd_misc.cpp @@ -0,0 +1,35 @@ +/* This file is part of the dynarmic project. + * Copyright (c) 2020 MerryMage + * SPDX-License-Identifier: 0BSD + */ + +#include "common/assert.h" +#include "common/bit_util.h" + +#include "frontend/A32/translate/impl/translate_arm.h" + +namespace Dynarmic::A32 { + +bool ArmTranslatorVisitor::asimd_VEXT(bool D, size_t Vn, size_t Vd, Imm<4> imm4, bool N, bool Q, bool M, size_t Vm) { + if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + return UndefinedInstruction(); + } + + if (!Q && imm4.Bit<3>()) { + return UndefinedInstruction(); + } + + const u8 position = 8 * imm4.ZeroExtend(); + const auto d = ToVector(Q, Vd, D); + const auto m = ToVector(Q, Vm, M); + const auto n = ToVector(Q, Vn, N); + + const auto reg_n = ir.GetVector(n); + const auto reg_m = ir.GetVector(m); + const auto result = Q ? ir.VectorExtract(reg_n, reg_m, position) : ir.VectorExtractLower(reg_n, reg_m, position); + + ir.SetVector(d, result); + return true; +} + +} // namespace Dynarmic::A32 diff --git a/src/frontend/A32/translate/impl/translate_arm.h b/src/frontend/A32/translate/impl/translate_arm.h index 3b4e977c..2a070288 100644 --- a/src/frontend/A32/translate/impl/translate_arm.h +++ b/src/frontend/A32/translate/impl/translate_arm.h @@ -503,6 +503,9 @@ struct ArmTranslatorVisitor final { bool asimd_VRECPE(bool D, size_t sz, size_t Vd, bool F, bool Q, bool M, size_t Vm); bool asimd_VRSQRTE(bool D, size_t sz, size_t Vd, bool F, bool Q, bool M, size_t Vm); + // Advanced SIMD miscellaneous + bool asimd_VEXT(bool D, size_t Vn, size_t Vd, Imm<4> imm4, bool N, bool Q, bool M, size_t Vm); + // Advanced SIMD load/store structures bool v8_VST_multiple(bool D, Reg n, size_t Vd, Imm<4> type, size_t sz, size_t align, Reg m); bool v8_VLD_multiple(bool D, Reg n, size_t Vd, Imm<4> type, size_t sz, size_t align, Reg m);