From 381821eda3c4e7c1537184b9f08fe9d9be12981d Mon Sep 17 00:00:00 2001
From: MerryMage <MerryMage@users.noreply.github.com>
Date: Tue, 31 Jul 2018 16:01:28 +0100
Subject: [PATCH] a32/fuzz_arm: Disable vfp tests

---
 tests/A32/fuzz_arm.cpp | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/tests/A32/fuzz_arm.cpp b/tests/A32/fuzz_arm.cpp
index 4aa2532b..9e10ac3a 100644
--- a/tests/A32/fuzz_arm.cpp
+++ b/tests/A32/fuzz_arm.cpp
@@ -403,21 +403,21 @@ static void RunVfpTests(u32 instr, std::vector<VfpTest> tests) {
     }
 }
 
-TEST_CASE("vfp: vadd", "[vfp][A32]") {
+TEST_CASE("vfp: vadd", "[.vfp][A32]") {
     // vadd.f32 s2, s4, s6
     RunVfpTests(0xEE321A03, {
 #include "vfp_vadd_f32.inc"
     });
 }
 
-TEST_CASE("vfp: vsub", "[vfp][A32]") {
+TEST_CASE("vfp: vsub", "[.vfp][A32]") {
     // vsub.f32 s2, s4, s6
     RunVfpTests(0xEE321A43, {
 #include "vfp_vsub_f32.inc"
     });
 }
 
-TEST_CASE("VFP: VMOV", "[JitX64][vfp][A32]") {
+TEST_CASE("VFP: VMOV", "[JitX64][.vfp][A32]") {
     const auto is_valid = [](u32 instr) -> bool {
         return Bits<0, 6>(instr) != 0b111111
                 && Bits<12, 15>(instr) != 0b1111
@@ -441,7 +441,7 @@ TEST_CASE("VFP: VMOV", "[JitX64][vfp][A32]") {
     });
 }
 
-TEST_CASE("VFP: VMOV (reg), VLDR, VSTR", "[JitX64][vfp][A32]") {
+TEST_CASE("VFP: VMOV (reg), VLDR, VSTR", "[JitX64][.vfp][A32]") {
     const std::array<InstructionGenerator, 4> instructions = {{
         InstructionGenerator("1111000100000001000000e000000000"), // SETEND
         InstructionGenerator("cccc11101D110000dddd101z01M0mmmm"), // VMOV (reg)
@@ -454,7 +454,7 @@ TEST_CASE("VFP: VMOV (reg), VLDR, VSTR", "[JitX64][vfp][A32]") {
     });
 }
 
-TEST_CASE("VFP: VCMP", "[JitX64][vfp][A32]") {
+TEST_CASE("VFP: VCMP", "[JitX64][.vfp][A32]") {
     const std::array<InstructionGenerator, 2> instructions = {{
         InstructionGenerator("cccc11101D110100dddd101zE1M0mmmm"), // VCMP
         InstructionGenerator("cccc11101D110101dddd101zE1000000"), // VCMP (zero)
@@ -1021,7 +1021,7 @@ TEST_CASE( "SMUAD", "[JitX64][A32]" ) {
     REQUIRE(jit.Cpsr() == 0x080001d0);
 }
 
-TEST_CASE("VFP: VPUSH, VPOP", "[JitX64][vfp][A32]") {
+TEST_CASE("VFP: VPUSH, VPOP", "[JitX64][.vfp][A32]") {
     const auto is_valid = [](u32 instr) -> bool {
         auto regs = (instr & 0x100) ? (Bits<0, 7>(instr) >> 1) : Bits<0, 7>(instr);
         auto base = Bits<12, 15>(instr);