From 43a4b2a0b8a406a359ac7495e67a8f316b4c5054 Mon Sep 17 00:00:00 2001 From: MerryMage Date: Sun, 21 Jun 2020 13:57:34 +0100 Subject: [PATCH] ir_emitter: Remove dummy fpcr_controlled arguments from scalar FP instructions --- .../A64/translate/impl/simd_three_same.cpp | 8 ++--- src/frontend/ir/ir_emitter.cpp | 30 +++++++------------ src/frontend/ir/ir_emitter.h | 20 ++++++------- 3 files changed, 24 insertions(+), 34 deletions(-) diff --git a/src/frontend/A64/translate/impl/simd_three_same.cpp b/src/frontend/A64/translate/impl/simd_three_same.cpp index 62d5f938..857eadbd 100644 --- a/src/frontend/A64/translate/impl/simd_three_same.cpp +++ b/src/frontend/A64/translate/impl/simd_three_same.cpp @@ -228,7 +228,7 @@ bool FPMinMaxOperation(TranslatorVisitor& v, bool Q, bool sz, Vec Vm, Vec Vn, Ve } bool FPMinMaxNumericOperation(TranslatorVisitor& v, bool Q, bool sz, Vec Vm, Vec Vn, Vec Vd, - IR::U32U64 (IREmitter::* fn)(const IR::U32U64&, const IR::U32U64&, bool)) { + IR::U32U64 (IREmitter::* fn)(const IR::U32U64&, const IR::U32U64&)) { if (sz && !Q) { return v.ReservedValue(); } @@ -244,7 +244,7 @@ bool FPMinMaxNumericOperation(TranslatorVisitor& v, bool Q, bool sz, Vec Vm, Vec for (size_t i = 0; i < elements; i++) { const IR::UAny elem1 = v.ir.VectorGetElement(esize, operand1, i); const IR::UAny elem2 = v.ir.VectorGetElement(esize, operand2, i); - const IR::UAny result_elem = (v.ir.*fn)(elem1, elem2, true); + const IR::UAny result_elem = (v.ir.*fn)(elem1, elem2); result = v.ir.VectorSetElement(esize, result, i, result_elem); } @@ -292,7 +292,7 @@ bool PairedMinMaxOperation(TranslatorVisitor& v, bool Q, Imm<2> size, Vec Vm, Ve } bool FPPairedMinMax(TranslatorVisitor& v, bool Q, bool sz, Vec Vm, Vec Vn, Vec Vd, - IR::U32U64 (IREmitter::* fn)(const IR::U32U64&, const IR::U32U64&, bool)) { + IR::U32U64 (IREmitter::* fn)(const IR::U32U64&, const IR::U32U64&)) { if (sz && !Q) { return v.ReservedValue(); } @@ -310,7 +310,7 @@ bool FPPairedMinMax(TranslatorVisitor& v, bool Q, bool sz, Vec Vm, Vec Vn, Vec V for (size_t i = 0; i < elements; i += 2, result_start_index++) { const IR::UAny elem1 = v.ir.VectorGetElement(esize, operand, i); const IR::UAny elem2 = v.ir.VectorGetElement(esize, operand, i + 1); - const IR::UAny result_elem = (v.ir.*fn)(elem1, elem2, true); + const IR::UAny result_elem = (v.ir.*fn)(elem1, elem2); result = v.ir.VectorSetElement(esize, result, result_start_index, result_elem); } diff --git a/src/frontend/ir/ir_emitter.cpp b/src/frontend/ir/ir_emitter.cpp index fc832692..7d876d7c 100644 --- a/src/frontend/ir/ir_emitter.cpp +++ b/src/frontend/ir/ir_emitter.cpp @@ -1870,8 +1870,7 @@ U16U32U64 IREmitter::FPAbs(const U16U32U64& a) { } } -U32U64 IREmitter::FPAdd(const U32U64& a, const U32U64& b, bool fpcr_controlled) { - ASSERT(fpcr_controlled); +U32U64 IREmitter::FPAdd(const U32U64& a, const U32U64& b) { ASSERT(a.GetType() == b.GetType()); switch (a.GetType()) { @@ -1884,8 +1883,7 @@ U32U64 IREmitter::FPAdd(const U32U64& a, const U32U64& b, bool fpcr_controlled) } } -NZCV IREmitter::FPCompare(const U32U64& a, const U32U64& b, bool exc_on_qnan, bool fpcr_controlled) { - ASSERT(fpcr_controlled); +NZCV IREmitter::FPCompare(const U32U64& a, const U32U64& b, bool exc_on_qnan) { ASSERT(a.GetType() == b.GetType()); const IR::U1 exc_on_qnan_imm = Imm1(exc_on_qnan); @@ -1900,8 +1898,7 @@ NZCV IREmitter::FPCompare(const U32U64& a, const U32U64& b, bool exc_on_qnan, bo } } -U32U64 IREmitter::FPDiv(const U32U64& a, const U32U64& b, bool fpcr_controlled) { - ASSERT(fpcr_controlled); +U32U64 IREmitter::FPDiv(const U32U64& a, const U32U64& b) { ASSERT(a.GetType() == b.GetType()); switch (a.GetType()) { @@ -1914,8 +1911,7 @@ U32U64 IREmitter::FPDiv(const U32U64& a, const U32U64& b, bool fpcr_controlled) } } -U32U64 IREmitter::FPMax(const U32U64& a, const U32U64& b, bool fpcr_controlled) { - ASSERT(fpcr_controlled); +U32U64 IREmitter::FPMax(const U32U64& a, const U32U64& b) { ASSERT(a.GetType() == b.GetType()); switch (a.GetType()) { @@ -1928,8 +1924,7 @@ U32U64 IREmitter::FPMax(const U32U64& a, const U32U64& b, bool fpcr_controlled) } } -U32U64 IREmitter::FPMaxNumeric(const U32U64& a, const U32U64& b, bool fpcr_controlled) { - ASSERT(fpcr_controlled); +U32U64 IREmitter::FPMaxNumeric(const U32U64& a, const U32U64& b) { ASSERT(a.GetType() == b.GetType()); switch (a.GetType()) { @@ -1942,8 +1937,7 @@ U32U64 IREmitter::FPMaxNumeric(const U32U64& a, const U32U64& b, bool fpcr_contr } } -U32U64 IREmitter::FPMin(const U32U64& a, const U32U64& b, bool fpcr_controlled) { - ASSERT(fpcr_controlled); +U32U64 IREmitter::FPMin(const U32U64& a, const U32U64& b) { ASSERT(a.GetType() == b.GetType()); switch (a.GetType()) { @@ -1956,8 +1950,7 @@ U32U64 IREmitter::FPMin(const U32U64& a, const U32U64& b, bool fpcr_controlled) } } -U32U64 IREmitter::FPMinNumeric(const U32U64& a, const U32U64& b, bool fpcr_controlled) { - ASSERT(fpcr_controlled); +U32U64 IREmitter::FPMinNumeric(const U32U64& a, const U32U64& b) { ASSERT(a.GetType() == b.GetType()); switch (a.GetType()) { @@ -1970,8 +1963,7 @@ U32U64 IREmitter::FPMinNumeric(const U32U64& a, const U32U64& b, bool fpcr_contr } } -U32U64 IREmitter::FPMul(const U32U64& a, const U32U64& b, bool fpcr_controlled) { - ASSERT(fpcr_controlled); +U32U64 IREmitter::FPMul(const U32U64& a, const U32U64& b) { ASSERT(a.GetType() == b.GetType()); switch (a.GetType()) { @@ -1984,8 +1976,7 @@ U32U64 IREmitter::FPMul(const U32U64& a, const U32U64& b, bool fpcr_controlled) } } -U16U32U64 IREmitter::FPMulAdd(const U16U32U64& a, const U16U32U64& b, const U16U32U64& c, bool fpcr_controlled) { - ASSERT(fpcr_controlled); +U16U32U64 IREmitter::FPMulAdd(const U16U32U64& a, const U16U32U64& b, const U16U32U64& c) { ASSERT(a.GetType() == b.GetType()); switch (a.GetType()) { @@ -2122,8 +2113,7 @@ U32U64 IREmitter::FPSqrt(const U32U64& a) { } } -U32U64 IREmitter::FPSub(const U32U64& a, const U32U64& b, bool fpcr_controlled) { - ASSERT(fpcr_controlled); +U32U64 IREmitter::FPSub(const U32U64& a, const U32U64& b) { ASSERT(a.GetType() == b.GetType()); switch (a.GetType()) { diff --git a/src/frontend/ir/ir_emitter.h b/src/frontend/ir/ir_emitter.h index 179a2c3f..163068c8 100644 --- a/src/frontend/ir/ir_emitter.h +++ b/src/frontend/ir/ir_emitter.h @@ -313,15 +313,15 @@ public: U128 ZeroVector(); U16U32U64 FPAbs(const U16U32U64& a); - U32U64 FPAdd(const U32U64& a, const U32U64& b, bool fpcr_controlled = true); - NZCV FPCompare(const U32U64& a, const U32U64& b, bool exc_on_qnan, bool fpcr_controlled = true); - U32U64 FPDiv(const U32U64& a, const U32U64& b, bool fpcr_controlled = true); - U32U64 FPMax(const U32U64& a, const U32U64& b, bool fpcr_controlled = true); - U32U64 FPMaxNumeric(const U32U64& a, const U32U64& b, bool fpcr_controlled = true); - U32U64 FPMin(const U32U64& a, const U32U64& b, bool fpcr_controlled = true); - U32U64 FPMinNumeric(const U32U64& a, const U32U64& b, bool fpcr_controlled = true); - U32U64 FPMul(const U32U64& a, const U32U64& b, bool fpcr_controlled = true); - U16U32U64 FPMulAdd(const U16U32U64& addend, const U16U32U64& op1, const U16U32U64& op2, bool fpcr_controlled = true); + U32U64 FPAdd(const U32U64& a, const U32U64& b); + NZCV FPCompare(const U32U64& a, const U32U64& b, bool exc_on_qnan); + U32U64 FPDiv(const U32U64& a, const U32U64& b); + U32U64 FPMax(const U32U64& a, const U32U64& b); + U32U64 FPMaxNumeric(const U32U64& a, const U32U64& b); + U32U64 FPMin(const U32U64& a, const U32U64& b); + U32U64 FPMinNumeric(const U32U64& a, const U32U64& b); + U32U64 FPMul(const U32U64& a, const U32U64& b); + U16U32U64 FPMulAdd(const U16U32U64& addend, const U16U32U64& op1, const U16U32U64& op2); U32U64 FPMulX(const U32U64& a, const U32U64& b); U16U32U64 FPNeg(const U16U32U64& a); U16U32U64 FPRecipEstimate(const U16U32U64& a); @@ -331,7 +331,7 @@ public: U16U32U64 FPRSqrtEstimate(const U16U32U64& a); U16U32U64 FPRSqrtStepFused(const U16U32U64& a, const U16U32U64& b); U32U64 FPSqrt(const U32U64& a); - U32U64 FPSub(const U32U64& a, const U32U64& b, bool fpcr_controlled = true); + U32U64 FPSub(const U32U64& a, const U32U64& b); U16 FPDoubleToHalf(const U64& a, FP::RoundingMode rounding); U32 FPDoubleToSingle(const U64& a, FP::RoundingMode rounding); U64 FPHalfToDouble(const U16& a, FP::RoundingMode rounding);