From 44d846045adb1c8c90e75a968552d200d8c70e88 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Thu, 19 Apr 2018 13:13:33 -0400 Subject: [PATCH] A64: Implement SHA512SU0 --- src/frontend/A64/decoder/a64.inc | 2 +- .../A64/translate/impl/simd_sha512.cpp | 24 +++++++++++++++++++ 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc index ec63a568..fea6d28c 100644 --- a/src/frontend/A64/decoder/a64.inc +++ b/src/frontend/A64/decoder/a64.inc @@ -872,7 +872,7 @@ INST(BCAX, "BCAX", "11001 INST(SM3SS1, "SM3SS1", "11001110010mmmmm0aaaaannnnnddddd") // Data Processing - FP and SIMD - SHA512 two register -//INST(SHA512SU0, "SHA512SU0", "1100111011000000100000nnnnnddddd") +INST(SHA512SU0, "SHA512SU0", "1100111011000000100000nnnnnddddd") //INST(SM4E, "SM4E", "1100111011000000100001nnnnnddddd") // Data Processing - FP and SIMD - Conversion between floating point and fixed point diff --git a/src/frontend/A64/translate/impl/simd_sha512.cpp b/src/frontend/A64/translate/impl/simd_sha512.cpp index 463f3043..7ac83aab 100644 --- a/src/frontend/A64/translate/impl/simd_sha512.cpp +++ b/src/frontend/A64/translate/impl/simd_sha512.cpp @@ -8,6 +8,30 @@ namespace Dynarmic::A64 { +bool TranslatorVisitor::SHA512SU0(Vec Vn, Vec Vd) { + const IR::U128 x = ir.GetQ(Vn); + const IR::U128 w = ir.GetQ(Vd); + + const auto make_sig = [](IREmitter& ir, IR::U64 data) { + const IR::U64 tmp1 = ir.RotateRight(data, ir.Imm8(1)); + const IR::U64 tmp2 = ir.RotateRight(data, ir.Imm8(8)); + const IR::U64 tmp3 = ir.LogicalShiftRight(data, ir.Imm8(7)); + + return ir.Eor(tmp1, ir.Eor(tmp2, tmp3)); + }; + + const IR::U64 lower_x = ir.VectorGetElement(64, x, 0); + const IR::U64 lower_w = ir.VectorGetElement(64, w, 0); + const IR::U64 upper_w = ir.VectorGetElement(64, w, 1); + + const IR::U128 low_result = ir.ZeroExtendToQuad(ir.Add(lower_w, make_sig(ir, upper_w))); + const IR::U64 high_result = ir.Add(upper_w, make_sig(ir, lower_x)); + const IR::U128 result = ir.VectorSetElement(64, low_result, 1, high_result); + + ir.SetQ(Vd, result); + return true; +} + bool TranslatorVisitor::RAX1(Vec Vm, Vec Vn, Vec Vd) { const IR::U128 m = ir.GetQ(Vm); const IR::U128 n = ir.GetQ(Vn);