From 44f7f04b5cfa3fa8f035e79877dbb749dde5b24f Mon Sep 17 00:00:00 2001 From: MerryMage Date: Fri, 5 Jan 2018 20:30:41 +0000 Subject: [PATCH] IR/Value: Rename RegRef and ExtRegRef to A32Reg and A32ExtReg --- src/frontend/ir/basic_block.cpp | 4 ++-- src/frontend/ir/opcodes.cpp | 4 ++-- src/frontend/ir/opcodes.h | 6 ++++-- src/frontend/ir/opcodes.inc | 12 ++++++------ src/frontend/ir/value.cpp | 8 ++++---- 5 files changed, 18 insertions(+), 16 deletions(-) diff --git a/src/frontend/ir/basic_block.cpp b/src/frontend/ir/basic_block.cpp index 4f243d3c..8fa5eb74 100644 --- a/src/frontend/ir/basic_block.cpp +++ b/src/frontend/ir/basic_block.cpp @@ -161,9 +161,9 @@ std::string DumpBlock(const IR::Block& block) { return fmt::format("#{}", arg.GetU8()); case Type::U32: return fmt::format("#{:#x}", arg.GetU32()); - case Type::RegRef: + case Type::A32Reg: return A32::RegToString(arg.GetA32RegRef()); - case Type::ExtRegRef: + case Type::A32ExtReg: return A32::ExtRegToString(arg.GetA32ExtRegRef()); default: return ""; diff --git a/src/frontend/ir/opcodes.cpp b/src/frontend/ir/opcodes.cpp index 1eea876b..c14cac96 100644 --- a/src/frontend/ir/opcodes.cpp +++ b/src/frontend/ir/opcodes.cpp @@ -52,8 +52,8 @@ const char* GetNameOf(Opcode op) { } const char* GetNameOf(Type type) { - static const std::array names = { - "Void", "RegRef", "ExtRegRef", "Opaque", "U1", "U8", "U16", "U32", "U64", "F32", "F64", "CoprocInfo" + static const std::array names = { + "Void", "A32Reg", "A32ExtReg", "A64Reg", "A64Vec", "Opaque", "U1", "U8", "U16", "U32", "U64", "F32", "F64", "CoprocInfo" }; return names.at(static_cast(type)); } diff --git a/src/frontend/ir/opcodes.h b/src/frontend/ir/opcodes.h index 06cea365..05c20e12 100644 --- a/src/frontend/ir/opcodes.h +++ b/src/frontend/ir/opcodes.h @@ -31,8 +31,10 @@ constexpr size_t OpcodeCount = static_cast(Opcode::NUM_OPCODE); */ enum class Type { Void, - RegRef, - ExtRegRef, + A32Reg, + A32ExtReg, + A64Reg, + A64Vec, Opaque, U1, U8, diff --git a/src/frontend/ir/opcodes.inc b/src/frontend/ir/opcodes.inc index fea73632..ed04d7bc 100644 --- a/src/frontend/ir/opcodes.inc +++ b/src/frontend/ir/opcodes.inc @@ -5,12 +5,12 @@ OPCODE(Identity, T::Opaque, T::Opaque OPCODE(Breakpoint, T::Void, ) // A32 Context getters/setters -A32OPC(GetRegister, T::U32, T::RegRef ) -A32OPC(GetExtendedRegister32, T::F32, T::ExtRegRef ) -A32OPC(GetExtendedRegister64, T::F64, T::ExtRegRef ) -A32OPC(SetRegister, T::Void, T::RegRef, T::U32 ) -A32OPC(SetExtendedRegister32, T::Void, T::ExtRegRef, T::F32 ) -A32OPC(SetExtendedRegister64, T::Void, T::ExtRegRef, T::F64 ) +A32OPC(GetRegister, T::U32, T::A32Reg ) +A32OPC(GetExtendedRegister32, T::F32, T::A32ExtReg ) +A32OPC(GetExtendedRegister64, T::F64, T::A32ExtReg ) +A32OPC(SetRegister, T::Void, T::A32Reg, T::U32 ) +A32OPC(SetExtendedRegister32, T::Void, T::A32ExtReg, T::F32 ) +A32OPC(SetExtendedRegister64, T::Void, T::A32ExtReg, T::F64 ) A32OPC(GetCpsr, T::U32, ) A32OPC(SetCpsr, T::Void, T::U32 ) A32OPC(SetCpsrNZCV, T::Void, T::U32 ) diff --git a/src/frontend/ir/value.cpp b/src/frontend/ir/value.cpp index cf533727..49b218c1 100644 --- a/src/frontend/ir/value.cpp +++ b/src/frontend/ir/value.cpp @@ -15,11 +15,11 @@ Value::Value(Inst* value) : type(Type::Opaque) { inner.inst = value; } -Value::Value(A32::Reg value) : type(Type::RegRef) { +Value::Value(A32::Reg value) : type(Type::A32Reg) { inner.imm_a32regref = value; } -Value::Value(A32::ExtReg value) : type(Type::ExtRegRef) { +Value::Value(A32::ExtReg value) : type(Type::A32ExtReg) { inner.imm_a32extregref = value; } @@ -69,12 +69,12 @@ Type Value::GetType() const { } A32::Reg Value::GetA32RegRef() const { - ASSERT(type == Type::RegRef); + ASSERT(type == Type::A32Reg); return inner.imm_a32regref; } A32::ExtReg Value::GetA32ExtRegRef() const { - ASSERT(type == Type::ExtRegRef); + ASSERT(type == Type::A32ExtReg); return inner.imm_a32extregref; }