From 48c7f8630c29e896702132fddd731d12e1c64af3 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Fri, 20 Apr 2018 15:33:14 -0400 Subject: [PATCH] A64: Implement ADDHN{2} and SUBHN{2} --- src/frontend/A64/decoder/a64.inc | 4 +- .../A64/translate/impl/simd_three_same.cpp | 43 +++++++++++++++++++ 2 files changed, 45 insertions(+), 2 deletions(-) diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc index 3ae84873..73655bd0 100644 --- a/src/frontend/A64/decoder/a64.inc +++ b/src/frontend/A64/decoder/a64.inc @@ -679,9 +679,9 @@ INST(SADDL, "SADDL, SADDL2", "0Q001 INST(SADDW, "SADDW, SADDW2", "0Q001110zz1mmmmm000100nnnnnddddd") INST(SSUBL, "SSUBL, SSUBL2", "0Q001110zz1mmmmm001000nnnnnddddd") INST(SSUBW, "SSUBW, SSUBW2", "0Q001110zz1mmmmm001100nnnnnddddd") -//INST(ADDHN, "ADDHN, ADDHN2", "0Q001110zz1mmmmm010000nnnnnddddd") +INST(ADDHN, "ADDHN, ADDHN2", "0Q001110zz1mmmmm010000nnnnnddddd") //INST(SABAL, "SABAL, SABAL2", "0Q001110zz1mmmmm010100nnnnnddddd") -//INST(SUBHN, "SUBHN, SUBHN2", "0Q001110zz1mmmmm011000nnnnnddddd") +INST(SUBHN, "SUBHN, SUBHN2", "0Q001110zz1mmmmm011000nnnnnddddd") //INST(SABDL, "SABDL, SABDL2", "0Q001110zz1mmmmm011100nnnnnddddd") //INST(SMLAL_vec, "SMLAL, SMLAL2 (vector)", "0Q001110zz1mmmmm100000nnnnnddddd") //INST(SMLSL_vec, "SMLSL, SMLSL2 (vector)", "0Q001110zz1mmmmm101000nnnnnddddd") diff --git a/src/frontend/A64/translate/impl/simd_three_same.cpp b/src/frontend/A64/translate/impl/simd_three_same.cpp index 71b6130e..1ca87cdd 100644 --- a/src/frontend/A64/translate/impl/simd_three_same.cpp +++ b/src/frontend/A64/translate/impl/simd_three_same.cpp @@ -7,6 +7,31 @@ #include "frontend/A64/translate/impl/impl.h" namespace Dynarmic::A64 { +namespace { +enum class HighNarrowingOp { + Add, + Subtract, +}; + +static void HighNarrowingOperation(TranslatorVisitor& v, bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd, + HighNarrowingOp op) { + const size_t part = Q; + const size_t esize = 8 << size.ZeroExtend(); + + const IR::U128 operand1 = v.ir.GetQ(Vn); + const IR::U128 operand2 = v.ir.GetQ(Vm); + const IR::U128 wide = [&] { + if (op == HighNarrowingOp::Add) { + return v.ir.VectorAdd(2 * esize, operand1, operand2); + } + return v.ir.VectorSub(2 * esize, operand1, operand2); + }(); + const IR::U128 result = v.ir.VectorNarrow(2 * esize, + v.ir.VectorLogicalShiftRight(2 * esize, wide, static_cast(esize))); + + v.Vpart(64, Vd, part, result); +} +} // Anonymous namespace bool TranslatorVisitor::CMGT_reg_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { if (size == 0b11 && !Q) return ReservedValue(); @@ -109,6 +134,24 @@ bool TranslatorVisitor::MUL_vec(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { return true; } +bool TranslatorVisitor::ADDHN(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { + if (size == 0b11) { + return ReservedValue(); + } + + HighNarrowingOperation(*this, Q, size, Vm, Vn, Vd, HighNarrowingOp::Add); + return true; +} + +bool TranslatorVisitor::SUBHN(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { + if (size == 0b11) { + return ReservedValue(); + } + + HighNarrowingOperation(*this, Q, size, Vm, Vn, Vd, HighNarrowingOp::Subtract); + return true; +} + bool TranslatorVisitor::ADDP_vec(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { if (size == 0b11 && !Q) return ReservedValue(); const size_t esize = 8 << size.ZeroExtend();