From 4df3b2f97f2fb2274b025a9165a147bd71f84874 Mon Sep 17 00:00:00 2001
From: MerryMage <MerryMage@users.noreply.github.com>
Date: Fri, 19 Jun 2020 19:24:05 +0100
Subject: [PATCH] vfp: Add decoders for VFPv5

These instructions were introduced in the Cortex-M7
---
 src/frontend/A32/decoder/vfp.h   | 24 ++++++++++++++++++++----
 src/frontend/A32/decoder/vfp.inc |  5 +++++
 2 files changed, 25 insertions(+), 4 deletions(-)

diff --git a/src/frontend/A32/decoder/vfp.h b/src/frontend/A32/decoder/vfp.h
index ac63f54c..2b78c66e 100644
--- a/src/frontend/A32/decoder/vfp.h
+++ b/src/frontend/A32/decoder/vfp.h
@@ -22,16 +22,32 @@ using VFPMatcher = Decoder::Matcher<Visitor, u32>;
 
 template<typename V>
 std::optional<std::reference_wrapper<const VFPMatcher<V>>> DecodeVFP(u32 instruction) {
-    static const std::vector<VFPMatcher<V>> table = {
+    using Table = std::vector<VFPMatcher<V>>;
+
+    static const struct Tables {
+        Table unconditional;
+        Table conditional;
+    } tables = []{
+        Table list = {
 
 #define INST(fn, name, bitstring) Decoder::detail::detail<VFPMatcher<V>>::GetMatcher(&V::fn, name, bitstring),
 #include "vfp.inc"
 #undef INST
 
-    };
+        };
 
-    if ((instruction & 0xF0000000) == 0xF0000000)
-        return std::nullopt; // Don't try matching any unconditional instructions.
+        const auto division = std::stable_partition(list.begin(), list.end(), [&](const auto& matcher) {
+            return (matcher.GetMask() & 0xF0000000) == 0xF0000000;
+        });
+
+        return Tables{
+            Table{list.begin(), division},
+            Table{division, list.end()},
+        };
+    }();
+
+    const bool is_unconditional = (instruction & 0xF0000000) == 0xF0000000;
+    const Table& table = is_unconditional ? tables.unconditional : tables.conditional;
 
     const auto matches_instruction = [instruction](const auto& matcher){ return matcher.Matches(instruction); };
 
diff --git a/src/frontend/A32/decoder/vfp.inc b/src/frontend/A32/decoder/vfp.inc
index c82c81b5..c1407ded 100644
--- a/src/frontend/A32/decoder/vfp.inc
+++ b/src/frontend/A32/decoder/vfp.inc
@@ -12,6 +12,9 @@ INST(vfp_VFNMS,            "VFNMS",                   "cccc11101D01nnnndddd101zN
 INST(vfp_VFNMA,            "VFNMA",                   "cccc11101D01nnnndddd101zN1M0mmmm") // VFPv4
 INST(vfp_VFMA,             "VFMA",                    "cccc11101D10nnnndddd101zN0M0mmmm") // VFPv4
 INST(vfp_VFMS,             "VFMS",                    "cccc11101D10nnnndddd101zN1M0mmmm") // VFPv4
+//INST(vfp_VSEL,             "VSEL",                    "111111100Dccnnnndddd101zN0M0mmmm") // VFPv5
+//INST(vfp_VMAXNM,           "VMAXNNM",                 "111111101D00nnnndddd101zN0M0mmmm") // VFPv5
+//INST(vfp_VMINNM,           "VMINNM",                  "111111101D00nnnndddd101zN1M0mmmm") // VFPv5
 
 // Other floating-point data-processing instructions
 INST(vfp_VMOV_imm,         "VMOV (immediate)",        "cccc11101D11vvvvdddd101z0000vvvv") // VFPv3
@@ -29,6 +32,8 @@ INST(vfp_VCVT_from_int,    "VCVT (from int)",         "cccc11101D111000dddd101zs
 INST(vfp_VCVT_to_u32,      "VCVT (to u32)",           "cccc11101D111100dddd101zr1M0mmmm") // VFPv2
 INST(vfp_VCVT_to_s32,      "VCVT (to s32)",           "cccc11101D111101dddd101zr1M0mmmm") // VFPv2
 //INST(vfp_VCVT_to_fixed,    "VCVT (to fixed)",         "cccc11101D11111Udddd101zx1i0vvvv") // VFPv3
+//INST(vfp_VRINT_rm,         "VRINT{A,N,P,M}",          "111111101D1110mmdddd101z01M0mmmm") // VFPv5
+//INST(vfp_VCVT_rm,          "VCVT{A,N,P,M}",           "111111101D1111mmdddd101zU1M0mmmm") // VFPv5
 
 // Floating-point move instructions
 INST(vfp_VMOV_u32_f64,     "VMOV (core to f64)",      "cccc11100000ddddtttt1011D0010000") // VFPv2