From 52cad2d9d01a3e08dc67a943bff4b6f0b0845329 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Thu, 12 Apr 2018 14:39:20 -0400 Subject: [PATCH] A64: Implement SSRA (scalar) --- src/frontend/A64/decoder/a64.inc | 2 +- .../translate/impl/simd_scalar_shift_by_immediate.cpp | 9 +++++++++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc index eb26238d..ae85b9e8 100644 --- a/src/frontend/A64/decoder/a64.inc +++ b/src/frontend/A64/decoder/a64.inc @@ -468,7 +468,7 @@ INST(SUB_1, "SUB (vector)", "01111 // Data Processing - FP and SIMD - SIMD Scalar shift by immediate INST(SSHR_1, "SSHR", "010111110IIIIiii000001nnnnnddddd") -//INST(SSRA_1, "SSRA", "010111110IIIIiii000101nnnnnddddd") +INST(SSRA_1, "SSRA", "010111110IIIIiii000101nnnnnddddd") //INST(SRSHR_1, "SRSHR", "010111110IIIIiii001001nnnnnddddd") //INST(SRSRA_1, "SRSRA", "010111110IIIIiii001101nnnnnddddd") INST(SHL_1, "SHL", "010111110IIIIiii010101nnnnnddddd") diff --git a/src/frontend/A64/translate/impl/simd_scalar_shift_by_immediate.cpp b/src/frontend/A64/translate/impl/simd_scalar_shift_by_immediate.cpp index 0b8c0df4..8c2ebeb3 100644 --- a/src/frontend/A64/translate/impl/simd_scalar_shift_by_immediate.cpp +++ b/src/frontend/A64/translate/impl/simd_scalar_shift_by_immediate.cpp @@ -48,6 +48,15 @@ bool TranslatorVisitor::SSHR_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) { return true; } +bool TranslatorVisitor::SSRA_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) { + if (!immh.Bit<3>()) { + return ReservedValue(); + } + + ShiftRight(*this, immh, immb, Vn, Vd, ShiftExtraBehavior::Accumulate, Signedness::Signed); + return true; +} + bool TranslatorVisitor::SHL_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) { if (!immh.Bit<3>()) { return ReservedValue();