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A64: Rearrange flag format/manipulation instructions

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Gives these instructions better categorical labeling.
This commit is contained in:
Lioncash 2019-03-04 12:04:22 -05:00 committed by MerryMage
parent 36027ebef5
commit 54e0b487f3
2 changed files with 12 additions and 16 deletions
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14
src/frontend/A64/decoder/a64.inc
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@ -80,8 +80,13 @@ INST(MSR_reg, "MSR (register)", "11010
//INST(SYSL, "SYSL", "1101010100101oooNNNNMMMMooottttt") //INST(SYSL, "SYSL", "1101010100101oooNNNNMMMMooottttt")
INST(MRS, "MRS", "110101010011poooNNNNMMMMooottttt") INST(MRS, "MRS", "110101010011poooNNNNMMMMooottttt")
// System - PSTATE // System - Flag manipulation instructions
//INST(CFINV, "CFINV", "11010101000000000100000000011111") // ARMv8.4 //INST(CFINV, "CFINV", "11010101000000000100000000011111") // ARMv8.4
//INST(RMIF, "RMIF", "10111010000iiiiii00001nnnnn0IIII") // ARMv8.4
//INST(SETF8, "SETF8", "0011101000000000000010nnnnn01101") // ARMv8.4
//INST(SETF16, "SETF16", "0011101000000000010010nnnnn01101") // ARMv8.4
// System - Flag format instructions
//INST(XAFlag, "XAFlag", "11010101000000000100000000111111") // ARMv8.5 //INST(XAFlag, "XAFlag", "11010101000000000100000000111111") // ARMv8.5
//INST(AXFlag, "AXFlag", "11010101000000000100000001011111") // ARMv8.5 //INST(AXFlag, "AXFlag", "11010101000000000100000001011111") // ARMv8.5
@ -96,13 +101,6 @@ INST(DC_CVAU, "DC CVAU", "11010
INST(DC_CVAP, "DC CVAP", "110101010000101101111100001ttttt") INST(DC_CVAP, "DC CVAP", "110101010000101101111100001ttttt")
INST(DC_CIVAC, "DC CIVAC", "110101010000101101111110001ttttt") INST(DC_CIVAC, "DC CIVAC", "110101010000101101111110001ttttt")
// Data processing - Rotate right into flags
//INST(RMIF, "RMIF", "10111010000iiiiii00001nnnnn0IIII") // ARMv8.4
// Data processing - Evaluate into flags
//INST(SETF8, "SETF8", "0011101000000000000010nnnnn01101") // ARMv8.4
//INST(SETF16, "SETF16", "0011101000000000010010nnnnn01101") // ARMv8.4
// Unconditonal branch (Register) // Unconditonal branch (Register)
INST(BLR, "BLR", "1101011000111111000000nnnnn00000") INST(BLR, "BLR", "1101011000111111000000nnnnn00000")
INST(BR, "BR", "1101011000011111000000nnnnn00000") INST(BR, "BR", "1101011000011111000000nnnnn00000")

14
src/frontend/A64/translate/impl/impl.h
View file

@ -155,8 +155,13 @@ struct TranslatorVisitor final {
bool SYSL(Imm<3> op1, Imm<4> CRn, Imm<4> CRm, Imm<3> op2, Reg Rt); bool SYSL(Imm<3> op1, Imm<4> CRn, Imm<4> CRm, Imm<3> op2, Reg Rt);
bool MRS(Imm<1> o0, Imm<3> op1, Imm<4> CRn, Imm<4> CRm, Imm<3> op2, Reg Rt); bool MRS(Imm<1> o0, Imm<3> op1, Imm<4> CRn, Imm<4> CRm, Imm<3> op2, Reg Rt);
// System - PSTATE // System - Flag manipulation instructions
bool CFINV(); bool CFINV();
bool RMIF(Imm<6> lsb, Reg Rn, Imm<4> mask);
bool SETF8(Reg Rn);
bool SETF16(Reg Rn);
// System - Flag format instructions
bool XAFlag(); bool XAFlag();
bool AXFlag(); bool AXFlag();
@ -171,13 +176,6 @@ struct TranslatorVisitor final {
bool DC_CVAP(Reg Rt); bool DC_CVAP(Reg Rt);
bool DC_CIVAC(Reg Rt); bool DC_CIVAC(Reg Rt);
// Data processing - Register - Rotate right into flags
bool RMIF(Imm<6> lsb, Reg Rn, Imm<4> mask);
// Data processing - Register - Evaluate into flags
bool SETF8(Reg Rn);
bool SETF16(Reg Rn);
// Unconditonal branch (Register) // Unconditonal branch (Register)
bool BR(Reg Rn); bool BR(Reg Rn);
bool BRA(bool Z, bool M, Reg Rn, Reg Rm); bool BRA(bool Z, bool M, Reg Rn, Reg Rm);