From 5a20a37d3f44e77946fff46abd0c9477b9027538 Mon Sep 17 00:00:00 2001
From: MerryMage <MerryMage@users.noreply.github.com>
Date: Sat, 11 Feb 2017 10:30:17 +0000
Subject: [PATCH] arm/fpscr: Correct Stride implementation

---
 src/frontend/arm/FPSCR.h                      | 15 ++++++++---
 src/frontend/translate/translate_arm/vfp2.cpp | 26 +++++++++----------
 2 files changed, 25 insertions(+), 16 deletions(-)

diff --git a/src/frontend/arm/FPSCR.h b/src/frontend/arm/FPSCR.h
index 5335be9d..ac64cce7 100644
--- a/src/frontend/arm/FPSCR.h
+++ b/src/frontend/arm/FPSCR.h
@@ -6,6 +6,8 @@
 
 #pragma once
 
+#include <boost/optional.hpp>
+
 #include "common/bit_util.h"
 #include "common/common_types.h"
 
@@ -83,12 +85,19 @@ public:
     }
 
     /// Indicates the stride of a vector.
-    u32 Stride() const {
-        return Common::Bits<20, 21>(value) + 1;
+    boost::optional<size_t> Stride() const {
+        switch (Common::Bits<20, 21>(value)) {
+        case 0b00:
+            return 1;
+        case 0b11:
+            return 2;
+        default:
+            return boost::none;
+        }
     }
 
     /// Indicates the length of a vector.
-    u32 Len() const {
+    size_t Len() const {
         return Common::Bits<16, 18>(value) + 1;
     }
 
diff --git a/src/frontend/translate/translate_arm/vfp2.cpp b/src/frontend/translate/translate_arm/vfp2.cpp
index 6b9aad1b..73ba6c07 100644
--- a/src/frontend/translate/translate_arm/vfp2.cpp
+++ b/src/frontend/translate/translate_arm/vfp2.cpp
@@ -18,7 +18,7 @@ static ExtReg ToExtReg(bool sz, size_t base, bool bit) {
 }
 
 bool ArmTranslatorVisitor::vfp2_VADD(Cond cond, bool D, size_t Vn, size_t Vd, bool sz, bool N, bool M, size_t Vm) {
-    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != 1)
+    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != boost::optional<size_t>{1})
         return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
 
     ExtReg d = ToExtReg(sz, Vd, D);
@@ -37,7 +37,7 @@ bool ArmTranslatorVisitor::vfp2_VADD(Cond cond, bool D, size_t Vn, size_t Vd, bo
 }
 
 bool ArmTranslatorVisitor::vfp2_VSUB(Cond cond, bool D, size_t Vn, size_t Vd, bool sz, bool N, bool M, size_t Vm) {
-    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != 1)
+    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != boost::optional<size_t>{1})
         return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
 
     ExtReg d = ToExtReg(sz, Vd, D);
@@ -56,7 +56,7 @@ bool ArmTranslatorVisitor::vfp2_VSUB(Cond cond, bool D, size_t Vn, size_t Vd, bo
 }
 
 bool ArmTranslatorVisitor::vfp2_VMUL(Cond cond, bool D, size_t Vn, size_t Vd, bool sz, bool N, bool M, size_t Vm) {
-    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != 1)
+    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != boost::optional<size_t>{1})
         return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
 
     ExtReg d = ToExtReg(sz, Vd, D);
@@ -75,7 +75,7 @@ bool ArmTranslatorVisitor::vfp2_VMUL(Cond cond, bool D, size_t Vn, size_t Vd, bo
 }
 
 bool ArmTranslatorVisitor::vfp2_VMLA(Cond cond, bool D, size_t Vn, size_t Vd, bool sz, bool N, bool M, size_t Vm) {
-    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != 1)
+    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != boost::optional<size_t>{1})
         return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
 
     ExtReg d = ToExtReg(sz, Vd, D);
@@ -95,7 +95,7 @@ bool ArmTranslatorVisitor::vfp2_VMLA(Cond cond, bool D, size_t Vn, size_t Vd, bo
 }
 
 bool ArmTranslatorVisitor::vfp2_VMLS(Cond cond, bool D, size_t Vn, size_t Vd, bool sz, bool N, bool M, size_t Vm) {
-    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != 1)
+    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != boost::optional<size_t>{1})
         return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
 
     ExtReg d = ToExtReg(sz, Vd, D);
@@ -115,7 +115,7 @@ bool ArmTranslatorVisitor::vfp2_VMLS(Cond cond, bool D, size_t Vn, size_t Vd, bo
 }
 
 bool ArmTranslatorVisitor::vfp2_VNMUL(Cond cond, bool D, size_t Vn, size_t Vd, bool sz, bool N, bool M, size_t Vm) {
-    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != 1)
+    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != boost::optional<size_t>{1})
         return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
 
     ExtReg d = ToExtReg(sz, Vd, D);
@@ -134,7 +134,7 @@ bool ArmTranslatorVisitor::vfp2_VNMUL(Cond cond, bool D, size_t Vn, size_t Vd, b
 }
 
 bool ArmTranslatorVisitor::vfp2_VNMLA(Cond cond, bool D, size_t Vn, size_t Vd, bool sz, bool N, bool M, size_t Vm) {
-    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != 1)
+    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != boost::optional<size_t>{1})
         return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
 
     ExtReg d = ToExtReg(sz, Vd, D);
@@ -154,7 +154,7 @@ bool ArmTranslatorVisitor::vfp2_VNMLA(Cond cond, bool D, size_t Vn, size_t Vd, b
 }
 
 bool ArmTranslatorVisitor::vfp2_VNMLS(Cond cond, bool D, size_t Vn, size_t Vd, bool sz, bool N, bool M, size_t Vm) {
-    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != 1)
+    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != boost::optional<size_t>{1})
         return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
 
     ExtReg d = ToExtReg(sz, Vd, D);
@@ -174,7 +174,7 @@ bool ArmTranslatorVisitor::vfp2_VNMLS(Cond cond, bool D, size_t Vn, size_t Vd, b
 }
 
 bool ArmTranslatorVisitor::vfp2_VDIV(Cond cond, bool D, size_t Vn, size_t Vd, bool sz, bool N, bool M, size_t Vm) {
-    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != 1)
+    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != boost::optional<size_t>{1})
         return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
 
     ExtReg d = ToExtReg(sz, Vd, D);
@@ -297,7 +297,7 @@ bool ArmTranslatorVisitor::vfp2_VMOV_f64_2u32(Cond cond, Reg t2, Reg t, bool M,
 }
 
 bool ArmTranslatorVisitor::vfp2_VMOV_reg(Cond cond, bool D, size_t Vd, bool sz, bool M, size_t Vm) {
-    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != 1)
+    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != boost::optional<size_t>{1})
         return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
 
     ExtReg d = ToExtReg(sz, Vd, D);
@@ -310,7 +310,7 @@ bool ArmTranslatorVisitor::vfp2_VMOV_reg(Cond cond, bool D, size_t Vd, bool sz,
 }
 
 bool ArmTranslatorVisitor::vfp2_VABS(Cond cond, bool D, size_t Vd, bool sz, bool M, size_t Vm) {
-    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != 1)
+    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != boost::optional<size_t>{1})
         return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
 
     ExtReg d = ToExtReg(sz, Vd, D);
@@ -327,7 +327,7 @@ bool ArmTranslatorVisitor::vfp2_VABS(Cond cond, bool D, size_t Vd, bool sz, bool
 }
 
 bool ArmTranslatorVisitor::vfp2_VNEG(Cond cond, bool D, size_t Vd, bool sz, bool M, size_t Vm) {
-    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != 1)
+    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != boost::optional<size_t>{1})
         return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
 
     ExtReg d = ToExtReg(sz, Vd, D);
@@ -344,7 +344,7 @@ bool ArmTranslatorVisitor::vfp2_VNEG(Cond cond, bool D, size_t Vd, bool sz, bool
 }
 
 bool ArmTranslatorVisitor::vfp2_VSQRT(Cond cond, bool D, size_t Vd, bool sz, bool M, size_t Vm) {
-    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != 1)
+    if (ir.current_location.FPSCR().Len() != 1 || ir.current_location.FPSCR().Stride() != boost::optional<size_t>{1})
         return InterpretThisInstruction(); // TODO: Vectorised floating point instructions
 
     ExtReg d = ToExtReg(sz, Vd, D);