From 615ce8c7c5b584c2490f8cecffe52e455051292c Mon Sep 17 00:00:00 2001 From: Merry Date: Thu, 12 Aug 2021 13:06:15 +0100 Subject: [PATCH] IR: Remove A32 IR instructions Get{N,Z,V}Flag --- src/dynarmic/backend/x64/a32_emit_x64.cpp | 12 ------------ src/dynarmic/ir/microinstruction.cpp | 3 --- src/dynarmic/ir/opcodes.inc | 3 --- src/dynarmic/ir/opt/a32_get_set_elimination_pass.cpp | 12 ------------ 4 files changed, 30 deletions(-) diff --git a/src/dynarmic/backend/x64/a32_emit_x64.cpp b/src/dynarmic/backend/x64/a32_emit_x64.cpp index 37f97207..4c09621d 100644 --- a/src/dynarmic/backend/x64/a32_emit_x64.cpp +++ b/src/dynarmic/backend/x64/a32_emit_x64.cpp @@ -629,18 +629,10 @@ static void EmitSetFlag(BlockOfCode& code, A32EmitContext& ctx, IR::Inst* inst, } } -void A32EmitX64::EmitA32GetNFlag(A32EmitContext& ctx, IR::Inst* inst) { - EmitGetFlag(code, ctx, inst, NZCV::x64_n_flag_bit); -} - void A32EmitX64::EmitA32SetNFlag(A32EmitContext& ctx, IR::Inst* inst) { EmitSetFlag(code, ctx, inst, NZCV::x64_n_flag_bit); } -void A32EmitX64::EmitA32GetZFlag(A32EmitContext& ctx, IR::Inst* inst) { - EmitGetFlag(code, ctx, inst, NZCV::x64_z_flag_bit); -} - void A32EmitX64::EmitA32SetZFlag(A32EmitContext& ctx, IR::Inst* inst) { EmitSetFlag(code, ctx, inst, NZCV::x64_z_flag_bit); } @@ -653,10 +645,6 @@ void A32EmitX64::EmitA32SetCFlag(A32EmitContext& ctx, IR::Inst* inst) { EmitSetFlag(code, ctx, inst, NZCV::x64_c_flag_bit); } -void A32EmitX64::EmitA32GetVFlag(A32EmitContext& ctx, IR::Inst* inst) { - EmitGetFlag(code, ctx, inst, NZCV::x64_v_flag_bit); -} - void A32EmitX64::EmitA32SetVFlag(A32EmitContext& ctx, IR::Inst* inst) { EmitSetFlag(code, ctx, inst, NZCV::x64_v_flag_bit); } diff --git a/src/dynarmic/ir/microinstruction.cpp b/src/dynarmic/ir/microinstruction.cpp index 0b2fc9e3..dae5f6ae 100644 --- a/src/dynarmic/ir/microinstruction.cpp +++ b/src/dynarmic/ir/microinstruction.cpp @@ -155,10 +155,7 @@ bool Inst::IsMemoryReadOrWrite() const { bool Inst::ReadsFromCPSR() const { switch (op) { case Opcode::A32GetCpsr: - case Opcode::A32GetNFlag: - case Opcode::A32GetZFlag: case Opcode::A32GetCFlag: - case Opcode::A32GetVFlag: case Opcode::A32GetGEFlags: case Opcode::A32UpdateUpperLocationDescriptor: case Opcode::A64GetCFlag: diff --git a/src/dynarmic/ir/opcodes.inc b/src/dynarmic/ir/opcodes.inc index 26d1bcff..41bd99b8 100644 --- a/src/dynarmic/ir/opcodes.inc +++ b/src/dynarmic/ir/opcodes.inc @@ -22,13 +22,10 @@ A32OPC(SetCpsr, Void, U32 A32OPC(SetCpsrNZCV, Void, NZCV ) A32OPC(SetCpsrNZCVRaw, Void, U32 ) A32OPC(SetCpsrNZCVQ, Void, U32 ) -A32OPC(GetNFlag, U1, ) A32OPC(SetNFlag, Void, U1 ) -A32OPC(GetZFlag, U1, ) A32OPC(SetZFlag, Void, U1 ) A32OPC(GetCFlag, U1, ) A32OPC(SetCFlag, Void, U1 ) -A32OPC(GetVFlag, U1, ) A32OPC(SetVFlag, Void, U1 ) A32OPC(OrQFlag, Void, U1 ) A32OPC(GetGEFlags, U32, ) diff --git a/src/dynarmic/ir/opt/a32_get_set_elimination_pass.cpp b/src/dynarmic/ir/opt/a32_get_set_elimination_pass.cpp index 03550c82..7bb1fd97 100644 --- a/src/dynarmic/ir/opt/a32_get_set_elimination_pass.cpp +++ b/src/dynarmic/ir/opt/a32_get_set_elimination_pass.cpp @@ -170,18 +170,10 @@ void A32GetSetElimination(IR::Block& block) { do_set(cpsr_info.n, inst->GetArg(0), inst); break; } - case IR::Opcode::A32GetNFlag: { - do_get(cpsr_info.n, inst); - break; - } case IR::Opcode::A32SetZFlag: { do_set(cpsr_info.z, inst->GetArg(0), inst); break; } - case IR::Opcode::A32GetZFlag: { - do_get(cpsr_info.z, inst); - break; - } case IR::Opcode::A32SetCFlag: { do_set(cpsr_info.c, inst->GetArg(0), inst); break; @@ -194,10 +186,6 @@ void A32GetSetElimination(IR::Block& block) { do_set(cpsr_info.v, inst->GetArg(0), inst); break; } - case IR::Opcode::A32GetVFlag: { - do_get(cpsr_info.v, inst); - break; - } case IR::Opcode::A32SetGEFlags: { do_set(cpsr_info.ge, inst->GetArg(0), inst); break;