From 646fd0592091c5c1e5899fa715bd7b7fcc977a3e Mon Sep 17 00:00:00 2001 From: MerryMage Date: Sat, 6 Mar 2021 19:46:34 +0000 Subject: [PATCH] thumb32: Implement RSB (reg) --- src/frontend/A32/decoder/thumb32.inc | 2 +- ...thumb32_data_processing_shifted_register.cpp | 17 +++++++++++++++++ .../A32/translate/impl/translate_thumb.h | 1 + 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/src/frontend/A32/decoder/thumb32.inc b/src/frontend/A32/decoder/thumb32.inc index 52e33e86..bd09a041 100644 --- a/src/frontend/A32/decoder/thumb32.inc +++ b/src/frontend/A32/decoder/thumb32.inc @@ -45,7 +45,7 @@ INST(thumb32_ADC_reg, "ADC (reg)", "11101011010Snnnn0vvvdd INST(thumb32_SBC_reg, "SBC (reg)", "11101011011Snnnn0vvvddddvvttmmmm") INST(thumb32_CMP_reg, "CMP (reg)", "111010111011nnnn0vvv1111vvttmmmm") INST(thumb32_SUB_reg, "SUB (reg)", "11101011101Snnnn0vvvddddvvttmmmm") -//INST(thumb32_RSB_reg, "RSB (reg)", "11101011110---------------------") +INST(thumb32_RSB_reg, "RSB (reg)", "11101011110Snnnn0vvvddddvvttmmmm") // Data Processing (Modified Immediate) INST(thumb32_TST_imm, "TST (imm)", "11110v000001nnnn0vvv1111vvvvvvvv") diff --git a/src/frontend/A32/translate/impl/thumb32_data_processing_shifted_register.cpp b/src/frontend/A32/translate/impl/thumb32_data_processing_shifted_register.cpp index 4655c95a..cfb33419 100644 --- a/src/frontend/A32/translate/impl/thumb32_data_processing_shifted_register.cpp +++ b/src/frontend/A32/translate/impl/thumb32_data_processing_shifted_register.cpp @@ -272,4 +272,21 @@ bool ThumbTranslatorVisitor::thumb32_SUB_reg(bool S, Reg n, Imm<3> imm3, Reg d, return true; } +bool ThumbTranslatorVisitor::thumb32_RSB_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m) { + if (d == Reg::PC || n == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto shifted = EmitImmShift(ir.GetRegister(m), type, imm3, imm2, ir.GetCFlag()); + const auto result = ir.SubWithCarry(shifted.result, ir.GetRegister(n), ir.Imm1(1)); + ir.SetRegister(d, result.result); + if (S) { + ir.SetNFlag(ir.MostSignificantBit(result.result)); + ir.SetZFlag(ir.IsZero(result.result)); + ir.SetCFlag(result.carry); + ir.SetVFlag(result.overflow); + } + return true; +} + } // namespace Dynarmic::A32 diff --git a/src/frontend/A32/translate/impl/translate_thumb.h b/src/frontend/A32/translate/impl/translate_thumb.h index 6471f3df..05ff0fdb 100644 --- a/src/frontend/A32/translate/impl/translate_thumb.h +++ b/src/frontend/A32/translate/impl/translate_thumb.h @@ -188,6 +188,7 @@ struct ThumbTranslatorVisitor final { bool thumb32_SBC_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m); bool thumb32_CMP_reg(Reg n, Imm<3> imm3, Imm<2> imm2, ShiftType type, Reg m); bool thumb32_SUB_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m); + bool thumb32_RSB_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m); // thumb32 data processing (modified immediate) instructions bool thumb32_TST_imm(Imm<1> i, Reg n, Imm<3> imm3, Imm<8> imm8);