From 69c999bc6678c7de7d9f4c335f452aca39ecb221 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Thu, 18 Jun 2020 11:03:29 -0400 Subject: [PATCH] A32: Implement ASIMD VRSRA Now that we have the accumulation and rounding code in place, VRSRA is extremely trivial to implement. --- src/frontend/A32/decoder/asimd.inc | 2 +- src/frontend/A32/translate/impl/asimd_two_regs_shift.cpp | 5 +++++ src/frontend/A32/translate/impl/translate_arm.h | 1 + 3 files changed, 7 insertions(+), 1 deletion(-) diff --git a/src/frontend/A32/decoder/asimd.inc b/src/frontend/A32/decoder/asimd.inc index 9067a74b..09b4909b 100644 --- a/src/frontend/A32/decoder/asimd.inc +++ b/src/frontend/A32/decoder/asimd.inc @@ -61,7 +61,7 @@ INST(asimd_VQSUB, "VQSUB", "1111001U0Dzznnnndddd001 INST(asimd_SHR, "SHR", "1111001U1Diiiiiidddd0000LQM1mmmm") // ASIMD INST(asimd_SRA, "SRA", "1111001U1Diiiiiidddd0001LQM1mmmm") // ASIMD INST(asimd_VRSHR, "VRSHR", "1111001U1Diiiiiidddd0010LQM1mmmm") // ASIMD -//INST(asimd_VRSRA, "VRSRA", "1111001U1-vvv-------0011LB-1----") // ASIMD +INST(asimd_VRSRA, "VRSRA", "1111001U1Diiiiiidddd0011LQM1mmmm") // ASIMD //INST(asimd_VSRI, "VSRI", "111100111-vvv-------0100LB-1----") // ASIMD //INST(asimd_VSHL, "VSHL", "111100101-vvv-------0101LB-1----") // ASIMD //INST(asimd_VSLI, "VSLI", "111100111-vvv-------0101LB-1----") // ASIMD diff --git a/src/frontend/A32/translate/impl/asimd_two_regs_shift.cpp b/src/frontend/A32/translate/impl/asimd_two_regs_shift.cpp index 44511205..2e4c6f5f 100644 --- a/src/frontend/A32/translate/impl/asimd_two_regs_shift.cpp +++ b/src/frontend/A32/translate/impl/asimd_two_regs_shift.cpp @@ -84,4 +84,9 @@ bool ArmTranslatorVisitor::asimd_VRSHR(bool U, bool D, size_t imm6, size_t Vd, b Accumulating::None, Rounding::Round); } +bool ArmTranslatorVisitor::asimd_VRSRA(bool U, bool D, size_t imm6, size_t Vd, bool L, bool Q, bool M, size_t Vm) { + return ShiftRight(*this, U, D, imm6, Vd, L, Q, M, Vm, + Accumulating::Accumulate, Rounding::Round); +} + } // namespace Dynarmic::A32 diff --git a/src/frontend/A32/translate/impl/translate_arm.h b/src/frontend/A32/translate/impl/translate_arm.h index dbf1a0a2..b4985135 100644 --- a/src/frontend/A32/translate/impl/translate_arm.h +++ b/src/frontend/A32/translate/impl/translate_arm.h @@ -455,6 +455,7 @@ struct ArmTranslatorVisitor final { bool asimd_SHR(bool U, bool D, size_t imm6, size_t Vd, bool L, bool Q, bool M, size_t Vm); bool asimd_SRA(bool U, bool D, size_t imm6, size_t Vd, bool L, bool Q, bool M, size_t Vm); bool asimd_VRSHR(bool U, bool D, size_t imm6, size_t Vd, bool L, bool Q, bool M, size_t Vm); + bool asimd_VRSRA(bool U, bool D, size_t imm6, size_t Vd, bool L, bool Q, bool M, size_t Vm); // Advanced SIMD two register, miscellaneous bool asimd_VREV(bool D, size_t sz, size_t Vd, size_t op, bool Q, bool M, size_t Vm);