diff --git a/include/dynarmic/A64/config.h b/include/dynarmic/A64/config.h
index 64c05b72..f1f6c305 100644
--- a/include/dynarmic/A64/config.h
+++ b/include/dynarmic/A64/config.h
@@ -38,6 +38,8 @@ enum class Exception {
     SendEventLocal,
     /// A YIELD instruction was executed.
     Yield,
+    /// A BRK instruction was executed.
+    Breakpoint,
 };
 
 enum class DataCacheOperation {
diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc
index b2498072..02b3e640 100644
--- a/src/frontend/A64/decoder/a64.inc
+++ b/src/frontend/A64/decoder/a64.inc
@@ -34,7 +34,7 @@ INST(B_cond,                 "B.cond",                                    "01010
 INST(SVC,                    "SVC",                                       "11010100000iiiiiiiiiiiiiiii00001")
 //INST(HVC,                    "HVC",                                       "11010100000iiiiiiiiiiiiiiii00010")
 //INST(SMC,                    "SMC",                                       "11010100000iiiiiiiiiiiiiiii00011")
-//INST(BRK,                    "BRK",                                       "11010100001iiiiiiiiiiiiiiii00000")
+INST(BRK,                    "BRK",                                       "11010100001iiiiiiiiiiiiiiii00000")
 //INST(HLT,                    "HLT",                                       "11010100010iiiiiiiiiiiiiiii00000")
 //INST(DCPS1,                  "DCPS1",                                     "11010100101iiiiiiiiiiiiiiii00001")
 //INST(DCPS2,                  "DCPS2",                                     "11010100101iiiiiiiiiiiiiiii00010")
diff --git a/src/frontend/A64/translate/impl/exception_generating.cpp b/src/frontend/A64/translate/impl/exception_generating.cpp
index 8995d6fe..f549a21c 100644
--- a/src/frontend/A64/translate/impl/exception_generating.cpp
+++ b/src/frontend/A64/translate/impl/exception_generating.cpp
@@ -8,6 +8,12 @@
 
 namespace Dynarmic::A64 {
 
+bool TranslatorVisitor::BRK([[maybe_unused]] Imm<16> imm16) {
+    ir.ExceptionRaised(Exception::Breakpoint);
+    ir.SetTerm(IR::Term::CheckHalt{IR::Term::ReturnToDispatch{}});
+    return false;
+}
+
 bool TranslatorVisitor::SVC(Imm<16> imm16) {
     ir.PushRSB(ir.current_location->AdvancePC(4));
     ir.SetPC(ir.Imm64(ir.current_location->PC() + 4));