From 6d9639e3b09683bcb2b584edc56bc07789bc61c2 Mon Sep 17 00:00:00 2001 From: MerryMage Date: Sun, 23 Sep 2018 10:04:23 +0100 Subject: [PATCH] emit_x64_vector: AVX2 implementation of EmitVectorLogicalVShiftU64() --- src/backend/x64/emit_x64_vector.cpp | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/src/backend/x64/emit_x64_vector.cpp b/src/backend/x64/emit_x64_vector.cpp index 539d6f5d..c776cb79 100644 --- a/src/backend/x64/emit_x64_vector.cpp +++ b/src/backend/x64/emit_x64_vector.cpp @@ -1429,6 +1429,28 @@ void EmitX64::EmitVectorLogicalVShiftU32(EmitContext& ctx, IR::Inst* inst) { } void EmitX64::EmitVectorLogicalVShiftU64(EmitContext& ctx, IR::Inst* inst) { + if (code.DoesCpuSupport(Xbyak::util::Cpu::tAVX2)) { + auto args = ctx.reg_alloc.GetArgumentInfo(inst); + + const Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]); + const Xbyak::Xmm left_shift = ctx.reg_alloc.UseScratchXmm(args[1]); + const Xbyak::Xmm right_shift = ctx.reg_alloc.ScratchXmm(); + const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm(); + + code.vmovdqa(tmp, code.MConst(xword, 0x00000000000000FF, 0x00000000000000FF)); + code.vpxor(right_shift, right_shift, right_shift); + code.vpsubq(right_shift, right_shift, left_shift); + code.vpand(left_shift, left_shift, tmp); + code.vpand(right_shift, right_shift, tmp); + + code.vpsllvq(tmp, result, left_shift); + code.vpsrlvq(result, result, right_shift); + code.vpor(result, result, tmp); + + ctx.reg_alloc.DefineValue(inst, result); + return; + } + EmitTwoArgumentFallback(code, ctx, inst, [](VectorArray& result, const VectorArray& a, const VectorArray& b) { std::transform(a.begin(), a.end(), b.begin(), result.begin(), LogicalVShift); });