diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc index 76131e00..2c40ecba 100644 --- a/src/frontend/A64/decoder/a64.inc +++ b/src/frontend/A64/decoder/a64.inc @@ -445,7 +445,7 @@ INST(ADDP_pair, "ADDP (scalar)", "01011 // Data Processing - FP and SIMD - SIMD Scalar three same //INST(SQADD_1, "SQADD", "01011110zz1mmmmm000011nnnnnddddd") //INST(SQSUB_1, "SQSUB", "01011110zz1mmmmm001011nnnnnddddd") -//INST(CMGT_reg_1, "CMGT (register)", "01011110zz1mmmmm001101nnnnnddddd") +INST(CMGT_reg_1, "CMGT (register)", "01011110zz1mmmmm001101nnnnnddddd") //INST(CMGE_reg_1, "CMGE (register)", "01011110zz1mmmmm001111nnnnnddddd") //INST(SSHL_1, "SSHL", "01011110zz1mmmmm010001nnnnnddddd") //INST(SQSHL_reg_1, "SQSHL (register)", "01011110zz1mmmmm010011nnnnnddddd") diff --git a/src/frontend/A64/translate/impl/simd_scalar_three_same.cpp b/src/frontend/A64/translate/impl/simd_scalar_three_same.cpp index 37a944cf..1e602a5e 100644 --- a/src/frontend/A64/translate/impl/simd_scalar_three_same.cpp +++ b/src/frontend/A64/translate/impl/simd_scalar_three_same.cpp @@ -23,6 +23,22 @@ bool TranslatorVisitor::ADD_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { return true; } +bool TranslatorVisitor::CMGT_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { + if (size != 0b11) { + return ReservedValue(); + } + + const size_t esize = 8 << size.ZeroExtend(); + const size_t datasize = 128; + + const IR::U128 operand1 = V(datasize, Vn); + const IR::U128 operand2 = V(datasize, Vm); + const IR::U128 result = ir.VectorGreaterSigned(esize, operand1, operand2); + + V_scalar(esize, Vd, ir.VectorGetElement(esize, result, 0)); + return true; +} + bool TranslatorVisitor::SUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { if (size != 0b11) { return ReservedValue();