From 76f986979d26397f324f72fd922995db99365a64 Mon Sep 17 00:00:00 2001 From: MerryMage Date: Sun, 5 May 2019 19:45:45 +0100 Subject: [PATCH] a32_jitstate: Rename FPSCR_mode to fpcr_mode --- src/backend/x64/a32_emit_x64.cpp | 4 ++-- src/backend/x64/a32_interface.cpp | 4 ++-- src/backend/x64/a32_jitstate.cpp | 8 ++++---- src/backend/x64/a32_jitstate.h | 2 +- src/backend/x64/a64_emit_x64.cpp | 2 +- 5 files changed, 10 insertions(+), 10 deletions(-) diff --git a/src/backend/x64/a32_emit_x64.cpp b/src/backend/x64/a32_emit_x64.cpp index 91cf3f13..6f840821 100644 --- a/src/backend/x64/a32_emit_x64.cpp +++ b/src/backend/x64/a32_emit_x64.cpp @@ -220,11 +220,11 @@ void A32EmitX64::GenTerminalHandlers() { // PC ends up in ebp, location_descriptor ends up in rbx const auto calculate_location_descriptor = [this] { // This calculation has to match up with IREmitter::PushRSB - // TODO: Optimization is available here based on known state of FPSCR_mode and CPSR_et. + // TODO: Optimization is available here based on known state of fpcr_mode and CPSR_et. code.mov(ecx, MJitStateReg(A32::Reg::PC)); code.mov(ebp, ecx); code.shl(rcx, 32); - code.mov(ebx, dword[r15 + offsetof(A32JitState, FPSCR_mode)]); + code.mov(ebx, dword[r15 + offsetof(A32JitState, fpcr_mode)]); code.or_(ebx, dword[r15 + offsetof(A32JitState, CPSR_et)]); code.or_(rbx, rcx); }; diff --git a/src/backend/x64/a32_interface.cpp b/src/backend/x64/a32_interface.cpp index 87cb5469..215fa420 100644 --- a/src/backend/x64/a32_interface.cpp +++ b/src/backend/x64/a32_interface.cpp @@ -114,7 +114,7 @@ private: u32 pc = jit_state.Reg[15]; A32::PSR cpsr{jit_state.Cpsr()}; - A32::FPSCR fpscr{jit_state.FPSCR_mode}; + A32::FPSCR fpscr{jit_state.fpcr_mode}; A32::LocationDescriptor descriptor{pc, cpsr, fpscr}; return this_.GetBasicBlock(descriptor).entrypoint; @@ -271,7 +271,7 @@ void TransferJitState(A32JitState& dest, const A32JitState& src, bool reset_rsb) dest.ExtReg = src.ExtReg; dest.guest_MXCSR = src.guest_MXCSR; dest.fpsr_idc = src.fpsr_idc; - dest.FPSCR_mode = src.FPSCR_mode; + dest.fpcr_mode = src.fpcr_mode; dest.FPSCR_nzcv = src.FPSCR_nzcv; if (reset_rsb) { dest.ResetRSB(); diff --git a/src/backend/x64/a32_jitstate.cpp b/src/backend/x64/a32_jitstate.cpp index 97ba5843..746ae05f 100644 --- a/src/backend/x64/a32_jitstate.cpp +++ b/src/backend/x64/a32_jitstate.cpp @@ -154,11 +154,11 @@ constexpr u32 FPSCR_MODE_MASK = A32::LocationDescriptor::FPSCR_MODE_MASK; constexpr u32 FPSCR_NZCV_MASK = 0xF0000000; u32 A32JitState::Fpscr() const { - ASSERT((FPSCR_mode & ~FPSCR_MODE_MASK) == 0); + ASSERT((fpcr_mode & ~FPSCR_MODE_MASK) == 0); ASSERT((FPSCR_nzcv & ~FPSCR_NZCV_MASK) == 0); ASSERT((fpsr_idc & ~(1 << 7)) == 0); - u32 FPSCR = FPSCR_mode | FPSCR_nzcv; + u32 FPSCR = fpcr_mode | FPSCR_nzcv; FPSCR |= (guest_MXCSR & 0b0000000000001); // IOC = IE FPSCR |= (guest_MXCSR & 0b0000000111100) >> 1; // IXC, UFC, OFC, DZC = PE, UE, OE, ZE FPSCR |= fpsr_idc; @@ -169,7 +169,7 @@ u32 A32JitState::Fpscr() const { void A32JitState::SetFpscr(u32 FPSCR) { old_FPSCR = FPSCR; - FPSCR_mode = FPSCR & FPSCR_MODE_MASK; + fpcr_mode = FPSCR & FPSCR_MODE_MASK; FPSCR_nzcv = FPSCR & FPSCR_NZCV_MASK; guest_MXCSR = 0; @@ -192,7 +192,7 @@ void A32JitState::SetFpscr(u32 FPSCR) { } u64 A32JitState::GetUniqueHash() const noexcept { - return CPSR_et | FPSCR_mode | (static_cast(Reg[15]) << 32); + return CPSR_et | fpcr_mode | (static_cast(Reg[15]) << 32); } } // namespace Dynarmic::BackendX64 diff --git a/src/backend/x64/a32_jitstate.h b/src/backend/x64/a32_jitstate.h index dc6c9e82..29bed92d 100644 --- a/src/backend/x64/a32_jitstate.h +++ b/src/backend/x64/a32_jitstate.h @@ -70,7 +70,7 @@ struct A32JitState { u32 fpsr_exc = 0; u32 fpsr_qc = 0; // Dummy value u32 fpsr_idc = 0; - u32 FPSCR_mode = 0; + u32 fpcr_mode = 0; u32 FPSCR_nzcv = 0; u32 old_FPSCR = 0; u32 Fpscr() const; diff --git a/src/backend/x64/a64_emit_x64.cpp b/src/backend/x64/a64_emit_x64.cpp index fb213d98..d25ddb5c 100644 --- a/src/backend/x64/a64_emit_x64.cpp +++ b/src/backend/x64/a64_emit_x64.cpp @@ -290,7 +290,7 @@ void A64EmitX64::GenTerminalHandlers() { // PC ends up in rbp, location_descriptor ends up in rbx const auto calculate_location_descriptor = [this] { // This calculation has to match up with A64::LocationDescriptor::UniqueHash - // TODO: Optimization is available here based on known state of FPSCR_mode and CPSR_et. + // TODO: Optimization is available here based on known state of fpcr. code.mov(rbp, qword[r15 + offsetof(A64JitState, pc)]); code.mov(rcx, A64::LocationDescriptor::PC_MASK); code.and_(rcx, rbp);