diff --git a/src/backend/x64/emit_x64_floating_point.cpp b/src/backend/x64/emit_x64_floating_point.cpp
index b06a9eeb..544df20e 100644
--- a/src/backend/x64/emit_x64_floating_point.cpp
+++ b/src/backend/x64/emit_x64_floating_point.cpp
@@ -39,6 +39,7 @@ namespace {
 const Xbyak::Reg64 INVALID_REG = Xbyak::Reg64(-1);
 
 constexpr u64 f16_negative_zero = 0x8000;
+constexpr u64 f16_non_sign_mask = 0x7fff;
 
 constexpr u64 f32_negative_zero = 0x80000000u;
 constexpr u64 f32_nan = 0x7fc00000u;
@@ -325,9 +326,18 @@ void FPThreeOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn)
 
 } // anonymous namespace
 
+void EmitX64::EmitFPAbs16(EmitContext& ctx, IR::Inst* inst) {
+    auto args = ctx.reg_alloc.GetArgumentInfo(inst);
+    const Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]);
+
+    code.pand(result, code.MConst(xword, f16_non_sign_mask));
+
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
 void EmitX64::EmitFPAbs32(EmitContext& ctx, IR::Inst* inst) {
     auto args = ctx.reg_alloc.GetArgumentInfo(inst);
-    Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]);
+    const Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]);
 
     code.pand(result, code.MConst(xword, f32_non_sign_mask));
 
@@ -336,7 +346,7 @@ void EmitX64::EmitFPAbs32(EmitContext& ctx, IR::Inst* inst) {
 
 void EmitX64::EmitFPAbs64(EmitContext& ctx, IR::Inst* inst) {
     auto args = ctx.reg_alloc.GetArgumentInfo(inst);
-    Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]);
+    const Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]);
 
     code.pand(result, code.MConst(xword, f64_non_sign_mask));
 
diff --git a/src/frontend/ir/ir_emitter.cpp b/src/frontend/ir/ir_emitter.cpp
index 75eb7b86..43bc01b3 100644
--- a/src/frontend/ir/ir_emitter.cpp
+++ b/src/frontend/ir/ir_emitter.cpp
@@ -1773,11 +1773,17 @@ U128 IREmitter::ZeroVector() {
     return Inst<U128>(Opcode::ZeroVector);
 }
 
-U32U64 IREmitter::FPAbs(const U32U64& a) {
-    if (a.GetType() == Type::U32) {
+U16U32U64 IREmitter::FPAbs(const U16U32U64& a) {
+    switch (a.GetType()) {
+    case Type::U16:
+        return Inst<U16>(Opcode::FPAbs16, a);
+    case Type::U32:
         return Inst<U32>(Opcode::FPAbs32, a);
-    } else {
+    case Type::U64:
         return Inst<U64>(Opcode::FPAbs64, a);
+    default:
+        UNREACHABLE();
+        return U16U32U64{};
     }
 }
 
diff --git a/src/frontend/ir/ir_emitter.h b/src/frontend/ir/ir_emitter.h
index fa33d21a..4bbf8866 100644
--- a/src/frontend/ir/ir_emitter.h
+++ b/src/frontend/ir/ir_emitter.h
@@ -292,7 +292,7 @@ public:
     U128 VectorZeroUpper(const U128& a);
     U128 ZeroVector();
 
-    U32U64 FPAbs(const U32U64& a);
+    U16U32U64 FPAbs(const U16U32U64& a);
     U32U64 FPAdd(const U32U64& a, const U32U64& b, bool fpcr_controlled);
     NZCV FPCompare(const U32U64& a, const U32U64& b, bool exc_on_qnan, bool fpcr_controlled);
     U32U64 FPDiv(const U32U64& a, const U32U64& b, bool fpcr_controlled);
diff --git a/src/frontend/ir/opcodes.inc b/src/frontend/ir/opcodes.inc
index 81205e13..2a9b9291 100644
--- a/src/frontend/ir/opcodes.inc
+++ b/src/frontend/ir/opcodes.inc
@@ -460,6 +460,7 @@ OPCODE(VectorZeroUpper,                                     U128,           U128
 OPCODE(ZeroVector,                                          U128,                                                                           )
 
 // Floating-point operations
+OPCODE(FPAbs16,                                             U16,            U16                                                             )
 OPCODE(FPAbs32,                                             U32,            U32                                                             )
 OPCODE(FPAbs64,                                             U64,            U64                                                             )
 OPCODE(FPAdd32,                                             U32,            U32,            U32                                             )