diff --git a/src/frontend/A64/translate/impl/move_wide.cpp b/src/frontend/A64/translate/impl/move_wide.cpp
index 37d3a9a4..cdbe5ded 100644
--- a/src/frontend/A64/translate/impl/move_wide.cpp
+++ b/src/frontend/A64/translate/impl/move_wide.cpp
@@ -9,45 +9,51 @@
 namespace Dynarmic::A64 {
 
 bool TranslatorVisitor::MOVN(bool sf, Imm<2> hw, Imm<16> imm16, Reg Rd) {
-    size_t datasize = sf ? 64 : 32;
+    if (!sf && hw.Bit<1>()) {
+        return UnallocatedEncoding();
+    }
 
-    if (!sf && hw.Bit<1>()) return UnallocatedEncoding();
-    size_t pos = hw.ZeroExtend<size_t>() << 4;
+    const size_t datasize = sf ? 64 : 32;
+    const size_t pos = hw.ZeroExtend<size_t>() << 4;
 
     u64 value = imm16.ZeroExtend<u64>() << pos;
     value = ~value;
-    auto result = I(datasize, value);
-    X(datasize, Rd, result);
 
+    const auto result = I(datasize, value);
+    X(datasize, Rd, result);
     return true;
 }
 
 bool TranslatorVisitor::MOVZ(bool sf, Imm<2> hw, Imm<16> imm16, Reg Rd) {
-    size_t datasize = sf ? 64 : 32;
+    if (!sf && hw.Bit<1>()) {
+        return UnallocatedEncoding();
+    }
 
-    if (!sf && hw.Bit<1>()) return UnallocatedEncoding();
-    size_t pos = hw.ZeroExtend<size_t>() << 4;
+    const size_t datasize = sf ? 64 : 32;
+    const size_t pos = hw.ZeroExtend<size_t>() << 4;
+
+    const u64 value = imm16.ZeroExtend<u64>() << pos;
+    const auto result = I(datasize, value);
 
-    u64 value = imm16.ZeroExtend<u64>() << pos;
-    auto result = I(datasize, value);
     X(datasize, Rd, result);
-
     return true;
 }
 
 bool TranslatorVisitor::MOVK(bool sf, Imm<2> hw, Imm<16> imm16, Reg Rd) {
-    size_t datasize = sf ? 64 : 32;
+    if (!sf && hw.Bit<1>()) {
+        return UnallocatedEncoding();
+    }
 
-    if (!sf && hw.Bit<1>()) return UnallocatedEncoding();
-    size_t pos = hw.ZeroExtend<size_t>() << 4;
+    const size_t datasize = sf ? 64 : 32;
+    const size_t pos = hw.ZeroExtend<size_t>() << 4;
+
+    const u64 mask = u64(0xFFFF) << pos;
+    const u64 value = imm16.ZeroExtend<u64>() << pos;
 
     auto result = X(datasize, Rd);
-    u64 mask = u64(0xFFFF) << pos;
-    u64 value = imm16.ZeroExtend<u64>() << pos;
     result = ir.And(result, I(datasize, ~mask));
     result = ir.Or(result, I(datasize, value));
     X(datasize, Rd, result);
-
     return true;
 }