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emit_arm64_packed: Implement {Get,Set}GEFlags

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Merry 2022-07-26 08:07:16 +01:00 committed by merry
parent 2dce8ea5a8
commit 8f1f1c8f0b
1 changed files with 10 additions and 8 deletions
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18
src/dynarmic/backend/arm64/emit_arm64_a32.cpp
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@ -312,18 +312,20 @@ void EmitIR<IR::Opcode::A32OrQFlag>(oaknut::CodeGenerator& code, EmitContext& ct
template<> template<>
void EmitIR<IR::Opcode::A32GetGEFlags>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::A32GetGEFlags>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
(void)code; auto Snzcv = ctx.reg_alloc.WriteS(inst);
(void)ctx; RegAlloc::Realize(Snzcv);
(void)inst;
ASSERT_FALSE("Unimplemented"); code.LDR(Snzcv, Xstate, offsetof(A32JitState, cpsr_ge));
} }
template<> template<>
void EmitIR<IR::Opcode::A32SetGEFlags>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::A32SetGEFlags>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
(void)code; auto args = ctx.reg_alloc.GetArgumentInfo(inst);
(void)ctx;
(void)inst; auto Snzcv = ctx.reg_alloc.ReadS(args[0]);
ASSERT_FALSE("Unimplemented"); RegAlloc::Realize(Snzcv);
code.STR(Snzcv, Xstate, offsetof(A32JitState, cpsr_ge));
} }
template<> template<>