diff --git a/src/dynarmic/backend/x64/a32_jitstate.cpp b/src/dynarmic/backend/x64/a32_jitstate.cpp
index 2d844780..5e70f90e 100644
--- a/src/dynarmic/backend/x64/a32_jitstate.cpp
+++ b/src/dynarmic/backend/x64/a32_jitstate.cpp
@@ -172,6 +172,7 @@ u32 A32JitState::Fpscr() const {
     FPSCR |= (mxcsr & 0b0000000000001);       // IOC = IE
     FPSCR |= (mxcsr & 0b0000000111100) >> 1;  // IXC, UFC, OFC, DZC = PE, UE, OE, ZE
     FPSCR |= fpsr_exc;
+    FPSCR |= fpsr_qc != 0 ? 1 << 27 : 0;
 
     return FPSCR;
 }
@@ -184,6 +185,7 @@ void A32JitState::SetFpscr(u32 FPSCR) {
     upper_location_descriptor |= FPSCR & FPSCR_MODE_MASK;
 
     fpsr_nzcv = FPSCR & FPSCR_NZCV_MASK;
+    fpsr_qc = (FPSCR >> 27) & 1;
 
     guest_MXCSR = 0x00001f80;
     asimd_MXCSR = 0x00009fc0;
diff --git a/src/dynarmic/backend/x64/a32_jitstate.h b/src/dynarmic/backend/x64/a32_jitstate.h
index 8fd57a6e..fa39e7e9 100644
--- a/src/dynarmic/backend/x64/a32_jitstate.h
+++ b/src/dynarmic/backend/x64/a32_jitstate.h
@@ -53,7 +53,7 @@ struct A32JitState {
     void ResetRSB();
 
     u32 fpsr_exc = 0;
-    u32 fpsr_qc = 0;  // Dummy value
+    u32 fpsr_qc = 0;
     u32 fpsr_nzcv = 0;
     u32 Fpscr() const;
     void SetFpscr(u32 FPSCR);