diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index c99dec73..7a12f2e1 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -154,6 +154,7 @@ if ("A32" IN_LIST DYNARMIC_FRONTENDS) frontend/A32/translate/impl/synchronization.cpp frontend/A32/translate/impl/thumb16.cpp frontend/A32/translate/impl/thumb32.cpp + frontend/A32/translate/impl/thumb32_data_processing_register.cpp frontend/A32/translate/impl/thumb32_long_multiply.cpp frontend/A32/translate/impl/thumb32_misc.cpp frontend/A32/translate/impl/thumb32_multiply.cpp diff --git a/src/frontend/A32/decoder/thumb32.inc b/src/frontend/A32/decoder/thumb32.inc index d5c26c6d..e03e2712 100644 --- a/src/frontend/A32/decoder/thumb32.inc +++ b/src/frontend/A32/decoder/thumb32.inc @@ -195,18 +195,18 @@ //INST(thumb32_LSR_reg, "LSR (reg)", "11111010001-----1111----0000----") //INST(thumb32_ASR_reg, "ASR (reg)", "11111010010-----1111----0000----") //INST(thumb32_ROR_reg, "ROR (reg)", "11111010011-----1111----0000----") -//INST(thumb32_SXTH, "SXTH", "11111010000011111111----1-------") -//INST(thumb32_SXTAH, "SXTAH", "111110100000----1111----1-------") -//INST(thumb32_UXTH, "UXTH", "11111010000111111111----1-------") -//INST(thumb32_UXTAH, "UXTAH", "111110100001----1111----1-------") -//INST(thumb32_SXTB16, "SXTB16", "11111010001011111111----1-------") -//INST(thumb32_SXTAB16, "SXTAB16", "111110100010----1111----1-------") -//INST(thumb32_UXTB16, "UXTB16", "11111010001111111111----1-------") -//INST(thumb32_UXTAB16, "UXTAB16", "111110100011----1111----1-------") -//INST(thumb32_SXTB, "SXTB", "11111010010011111111----1-------") -//INST(thumb32_SXTAB, "SXTAB", "111110100100----1111----1-------") -//INST(thumb32_UXTB, "UXTB", "11111010010111111111----1-------") -//INST(thumb32_UXTAB, "UXTAB", "111110100101----1111----1-------") +INST(thumb32_SXTH, "SXTH", "11111010000011111111dddd10rrmmmm") +INST(thumb32_SXTAH, "SXTAH", "111110100000nnnn1111dddd10rrmmmm") +INST(thumb32_UXTH, "UXTH", "11111010000111111111dddd10rrmmmm") +INST(thumb32_UXTAH, "UXTAH", "111110100001nnnn1111dddd10rrmmmm") +INST(thumb32_SXTB16, "SXTB16", "11111010001011111111dddd10rrmmmm") +INST(thumb32_SXTAB16, "SXTAB16", "111110100010nnnn1111dddd10rrmmmm") +INST(thumb32_UXTB16, "UXTB16", "11111010001111111111dddd10rrmmmm") +INST(thumb32_UXTAB16, "UXTAB16", "111110100011nnnn1111dddd10rrmmmm") +INST(thumb32_SXTB, "SXTB", "11111010010011111111dddd10rrmmmm") +INST(thumb32_SXTAB, "SXTAB", "111110100100nnnn1111dddd10rrmmmm") +INST(thumb32_UXTB, "UXTB", "11111010010111111111dddd10rrmmmm") +INST(thumb32_UXTAB, "UXTAB", "111110100101nnnn1111dddd10rrmmmm") // Parallel Addition and Subtraction (signed) INST(thumb32_SADD16, "SADD16", "111110101001nnnn1111dddd0000mmmm") diff --git a/src/frontend/A32/translate/impl/thumb32_data_processing_register.cpp b/src/frontend/A32/translate/impl/thumb32_data_processing_register.cpp new file mode 100644 index 00000000..cf6bbf7b --- /dev/null +++ b/src/frontend/A32/translate/impl/thumb32_data_processing_register.cpp @@ -0,0 +1,169 @@ +/* This file is part of the dynarmic project. + * Copyright (c) 2021 MerryMage + * SPDX-License-Identifier: 0BSD + */ + +#include "frontend/A32/translate/impl/translate_thumb.h" + +namespace Dynarmic::A32 { +static IR::U32 Rotate(A32::IREmitter& ir, Reg m, SignExtendRotation rotate) { + const u8 rotate_by = static_cast(static_cast(rotate) * 8); + return ir.RotateRight(ir.GetRegister(m), ir.Imm8(rotate_by), ir.Imm1(0)).result; +} + +bool ThumbTranslatorVisitor::thumb32_SXTB(Reg d, SignExtendRotation rotate, Reg m) { + if (d == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto rotated = Rotate(ir, m, rotate); + const auto result = ir.SignExtendByteToWord(ir.LeastSignificantByte(rotated)); + + ir.SetRegister(d, result); + return true; +} + +bool ThumbTranslatorVisitor::thumb32_SXTB16(Reg d, SignExtendRotation rotate, Reg m) { + if (d == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto rotated = Rotate(ir, m, rotate); + const auto low_byte = ir.And(rotated, ir.Imm32(0x00FF00FF)); + const auto sign_bit = ir.And(rotated, ir.Imm32(0x00800080)); + const auto result = ir.Or(low_byte, ir.Mul(sign_bit, ir.Imm32(0x1FE))); + + ir.SetRegister(d, result); + return true; +} + +bool ThumbTranslatorVisitor::thumb32_SXTAB(Reg n, Reg d, SignExtendRotation rotate, Reg m) { + if (d == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto rotated = Rotate(ir, m, rotate); + const auto reg_n = ir.GetRegister(n); + const auto result = ir.Add(reg_n, ir.SignExtendByteToWord(ir.LeastSignificantByte(rotated))); + + ir.SetRegister(d, result); + return true; +} + +bool ThumbTranslatorVisitor::thumb32_SXTAB16(Reg n, Reg d, SignExtendRotation rotate, Reg m) { + if (d == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto rotated = Rotate(ir, m, rotate); + const auto low_byte = ir.And(rotated, ir.Imm32(0x00FF00FF)); + const auto sign_bit = ir.And(rotated, ir.Imm32(0x00800080)); + const auto addend = ir.Or(low_byte, ir.Mul(sign_bit, ir.Imm32(0x1FE))); + const auto result = ir.PackedAddU16(addend, ir.GetRegister(n)).result; + + ir.SetRegister(d, result); + return true; +} + +bool ThumbTranslatorVisitor::thumb32_SXTH(Reg d, SignExtendRotation rotate, Reg m) { + if (d == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto rotated = Rotate(ir, m, rotate); + const auto result = ir.SignExtendHalfToWord(ir.LeastSignificantHalf(rotated)); + + ir.SetRegister(d, result); + return true; +} + +bool ThumbTranslatorVisitor::thumb32_SXTAH(Reg n, Reg d, SignExtendRotation rotate, Reg m) { + if (d == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto rotated = Rotate(ir, m, rotate); + const auto reg_n = ir.GetRegister(n); + const auto result = ir.Add(reg_n, ir.SignExtendHalfToWord(ir.LeastSignificantHalf(rotated))); + + ir.SetRegister(d, result); + return true; +} + +bool ThumbTranslatorVisitor::thumb32_UXTB(Reg d, SignExtendRotation rotate, Reg m) { + if (d == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto rotated = Rotate(ir, m, rotate); + const auto result = ir.ZeroExtendByteToWord(ir.LeastSignificantByte(rotated)); + + ir.SetRegister(d, result); + return true; +} + +bool ThumbTranslatorVisitor::thumb32_UXTB16(Reg d, SignExtendRotation rotate, Reg m) { + if (d == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto rotated = Rotate(ir, m, rotate); + const auto result = ir.And(rotated, ir.Imm32(0x00FF00FF)); + + ir.SetRegister(d, result); + return true; +} + +bool ThumbTranslatorVisitor::thumb32_UXTAB(Reg n, Reg d, SignExtendRotation rotate, Reg m) { + if (d == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto rotated = Rotate(ir, m, rotate); + const auto reg_n = ir.GetRegister(n); + const auto result = ir.Add(reg_n, ir.ZeroExtendByteToWord(ir.LeastSignificantByte(rotated))); + + ir.SetRegister(d, result); + return true; +} + +bool ThumbTranslatorVisitor::thumb32_UXTAB16(Reg n, Reg d, SignExtendRotation rotate, Reg m) { + if (d == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto rotated = Rotate(ir, m, rotate); + auto result = ir.And(rotated, ir.Imm32(0x00FF00FF)); + const auto reg_n = ir.GetRegister(n); + result = ir.PackedAddU16(reg_n, result).result; + + ir.SetRegister(d, result); + return true; +} + +bool ThumbTranslatorVisitor::thumb32_UXTH(Reg d, SignExtendRotation rotate, Reg m) { + if (d == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto rotated = Rotate(ir, m, rotate); + const auto result = ir.ZeroExtendHalfToWord(ir.LeastSignificantHalf(rotated)); + + ir.SetRegister(d, result); + return true; +} + +bool ThumbTranslatorVisitor::thumb32_UXTAH(Reg n, Reg d, SignExtendRotation rotate, Reg m) { + if (d == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto rotated = Rotate(ir, m, rotate); + const auto reg_n = ir.GetRegister(n); + const auto result = ir.Add(reg_n, ir.ZeroExtendHalfToWord(ir.LeastSignificantHalf(rotated))); + + ir.SetRegister(d, result); + return true; +} + +} // namespace Dynarmic::A32 diff --git a/src/frontend/A32/translate/impl/translate_thumb.h b/src/frontend/A32/translate/impl/translate_thumb.h index 98558a50..ceb54407 100644 --- a/src/frontend/A32/translate/impl/translate_thumb.h +++ b/src/frontend/A32/translate/impl/translate_thumb.h @@ -121,6 +121,20 @@ struct ThumbTranslatorVisitor final { bool thumb32_BLX_imm(Imm<11> hi, Imm<11> lo); bool thumb32_UDF(); + // thumb32 data processing (register) instructions + bool thumb32_SXTB(Reg d, SignExtendRotation rotate, Reg m); + bool thumb32_SXTB16(Reg d, SignExtendRotation rotate, Reg m); + bool thumb32_SXTAB(Reg n, Reg d, SignExtendRotation rotate, Reg m); + bool thumb32_SXTAB16(Reg n, Reg d, SignExtendRotation rotate, Reg m); + bool thumb32_SXTH(Reg d, SignExtendRotation rotate, Reg m); + bool thumb32_SXTAH(Reg n, Reg d, SignExtendRotation rotate, Reg m); + bool thumb32_UXTB(Reg d, SignExtendRotation rotate, Reg m); + bool thumb32_UXTB16(Reg d, SignExtendRotation rotate, Reg m); + bool thumb32_UXTAB(Reg n, Reg d, SignExtendRotation rotate, Reg m); + bool thumb32_UXTAB16(Reg n, Reg d, SignExtendRotation rotate, Reg m); + bool thumb32_UXTH(Reg d, SignExtendRotation rotate, Reg m); + bool thumb32_UXTAH(Reg n, Reg d, SignExtendRotation rotate, Reg m); + // thumb32 long multiply, long multiply accumulate, and divide instructions bool thumb32_SDIV(Reg n, Reg d, Reg m); bool thumb32_SMLAL(Reg n, Reg dLo, Reg dHi, Reg m);