From 975987f38e8f51d8a02b1fcc8b43928d79622495 Mon Sep 17 00:00:00 2001
From: MerryMage <MerryMage@users.noreply.github.com>
Date: Tue, 20 Dec 2016 20:04:38 +0000
Subject: [PATCH] fuzz_arm: Add test for edge-case of UASX instruction

---
 tests/arm/fuzz_arm.cpp | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/tests/arm/fuzz_arm.cpp b/tests/arm/fuzz_arm.cpp
index 10bb7aae..16fbd140 100644
--- a/tests/arm/fuzz_arm.cpp
+++ b/tests/arm/fuzz_arm.cpp
@@ -411,6 +411,30 @@ TEST_CASE( "arm: shsax r11, sp, r9 (Edge-case)", "[arm]" ) {
     REQUIRE( jit.Cpsr() == 0x000001d0 );
 }
 
+TEST_CASE( "arm: uasx (Edge-case)", "[arm]" ) {
+    // UASX's Rm<31:16> == 0x0000.
+    // An implementation that depends on addition overflow to detect
+    // if diff >= 0 will fail this testcase.
+
+    Dynarmic::Jit jit{GetUserCallbacks()};
+    code_mem.fill({});
+    code_mem[0] = 0xe6549f35; // uasx r9, r4, r5
+    code_mem[1] = 0xeafffffe; // b +#0
+
+    jit.Regs()[4] = 0x8ed38f4c;
+    jit.Regs()[5] = 0x0000261d;
+    jit.Regs()[15] = 0x00000000;
+    jit.Cpsr() = 0x000001d0; // User-mode
+
+    jit.Run(2);
+
+    REQUIRE( jit.Regs()[4] == 0x8ed38f4c );
+    REQUIRE( jit.Regs()[5] == 0x0000261d );
+    REQUIRE( jit.Regs()[9] == 0xb4f08f4c );
+    REQUIRE( jit.Regs()[15] == 0x00000004 );
+    REQUIRE( jit.Cpsr() == 0x000301d0 );
+}
+
 struct VfpTest {
     u32 initial_fpscr;
     u32 a;