diff --git a/src/frontend/A32/decoder/thumb32.h b/src/frontend/A32/decoder/thumb32.h index be111ad7..675797d9 100644 --- a/src/frontend/A32/decoder/thumb32.h +++ b/src/frontend/A32/decoder/thumb32.h @@ -251,7 +251,7 @@ std::optional>> DecodeThumb32(u32 INST(&V::thumb32_SHASX, "SHASX", "111110101010nnnn1111dddd0010mmmm"), INST(&V::thumb32_SHSAX, "SHSAX", "111110101110nnnn1111dddd0010mmmm"), INST(&V::thumb32_SHSUB16, "SHSUB16", "111110101101nnnn1111dddd0010mmmm"), - //INST(&V::thumb32_SHADD8, "SHADD8", "111110101000----1111----0010----"), + INST(&V::thumb32_SHADD8, "SHADD8", "111110101000nnnn1111dddd0010mmmm"), //INST(&V::thumb32_SHSUB8, "SHSUB8", "111110101100----1111----0010----"), // Parallel Addition and Subtraction (unsigned) @@ -271,7 +271,7 @@ std::optional>> DecodeThumb32(u32 INST(&V::thumb32_UHASX, "UHASX", "111110101010nnnn1111dddd0110mmmm"), INST(&V::thumb32_UHSAX, "UHSAX", "111110101110nnnn1111dddd0110mmmm"), INST(&V::thumb32_UHSUB16, "UHSUB16", "111110101101nnnn1111dddd0110mmmm"), - //INST(&V::thumb32_UHADD8, "UHADD8", "111110101000----1111----0110----"), + INST(&V::thumb32_UHADD8, "UHADD8", "111110101000nnnn1111dddd0110mmmm"), //INST(&V::thumb32_UHSUB8, "UHSUB8", "111110101100----1111----0110----"), // Miscellaneous Operations diff --git a/src/frontend/A32/translate/impl/thumb32_parallel.cpp b/src/frontend/A32/translate/impl/thumb32_parallel.cpp index e5792f9c..89f91393 100644 --- a/src/frontend/A32/translate/impl/thumb32_parallel.cpp +++ b/src/frontend/A32/translate/impl/thumb32_parallel.cpp @@ -362,6 +362,19 @@ bool ThumbTranslatorVisitor::thumb32_UQSUB16(Reg n, Reg d, Reg m) { return true; } +bool ThumbTranslatorVisitor::thumb32_SHADD8(Reg n, Reg d, Reg m) { + if (d == Reg::PC || n == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto reg_m = ir.GetRegister(m); + const auto reg_n = ir.GetRegister(n); + const auto result = ir.PackedHalvingAddS8(reg_n, reg_m); + + ir.SetRegister(d, result); + return true; +} + bool ThumbTranslatorVisitor::thumb32_SHADD16(Reg n, Reg d, Reg m) { if (d == Reg::PC || n == Reg::PC || m == Reg::PC) { return UnpredictableInstruction(); @@ -414,6 +427,19 @@ bool ThumbTranslatorVisitor::thumb32_SHSUB16(Reg n, Reg d, Reg m) { return true; } +bool ThumbTranslatorVisitor::thumb32_UHADD8(Reg n, Reg d, Reg m) { + if (d == Reg::PC || n == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto reg_m = ir.GetRegister(m); + const auto reg_n = ir.GetRegister(n); + const auto result = ir.PackedHalvingAddU8(reg_n, reg_m); + + ir.SetRegister(d, result); + return true; +} + bool ThumbTranslatorVisitor::thumb32_UHADD16(Reg n, Reg d, Reg m) { if (d == Reg::PC || n == Reg::PC || m == Reg::PC) { return UnpredictableInstruction(); diff --git a/src/frontend/A32/translate/impl/translate_thumb.h b/src/frontend/A32/translate/impl/translate_thumb.h index ea8c572e..a57ea7ff 100644 --- a/src/frontend/A32/translate/impl/translate_thumb.h +++ b/src/frontend/A32/translate/impl/translate_thumb.h @@ -155,10 +155,12 @@ struct ThumbTranslatorVisitor final { bool thumb32_UQSUB8(Reg n, Reg d, Reg m); bool thumb32_UQSUB16(Reg n, Reg d, Reg m); + bool thumb32_SHADD8(Reg n, Reg d, Reg m); bool thumb32_SHADD16(Reg n, Reg d, Reg m); bool thumb32_SHASX(Reg n, Reg d, Reg m); bool thumb32_SHSAX(Reg n, Reg d, Reg m); bool thumb32_SHSUB16(Reg n, Reg d, Reg m); + bool thumb32_UHADD8(Reg n, Reg d, Reg m); bool thumb32_UHADD16(Reg n, Reg d, Reg m); bool thumb32_UHASX(Reg n, Reg d, Reg m); bool thumb32_UHSAX(Reg n, Reg d, Reg m); diff --git a/tests/A32/fuzz_thumb.cpp b/tests/A32/fuzz_thumb.cpp index 23827c71..f39148ed 100644 --- a/tests/A32/fuzz_thumb.cpp +++ b/tests/A32/fuzz_thumb.cpp @@ -432,6 +432,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") { three_reg_not_r15), ThumbInstGen("111110101010nnnn1111dddd1000mmmm", // SEL three_reg_not_r15), + ThumbInstGen("111110101000nnnn1111dddd0010mmmm", // SHADD8 + three_reg_not_r15), ThumbInstGen("111110101001nnnn1111dddd0010mmmm", // SHADD16 three_reg_not_r15), ThumbInstGen("111110101010nnnn1111dddd0010mmmm", // SHASX @@ -452,6 +454,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") { three_reg_not_r15), ThumbInstGen("111110101010nnnn1111dddd0100mmmm", // UASX three_reg_not_r15), + ThumbInstGen("111110101000nnnn1111dddd0110mmmm", // UHADD8 + three_reg_not_r15), ThumbInstGen("111110101001nnnn1111dddd0110mmmm", // UHADD16 three_reg_not_r15), ThumbInstGen("111110101010nnnn1111dddd0110mmmm", // UHASX