From a2f8cdf0a38854aeddc138d745f22af939bbdc99 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Thu, 5 Apr 2018 09:43:38 -0400 Subject: [PATCH] A64: Implement SSUBL/SSUBL2 --- src/frontend/A64/decoder/a64.inc | 2 +- .../A64/translate/impl/simd_three_different.cpp | 16 ++++++++++++++++ 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/src/frontend/A64/decoder/a64.inc b/src/frontend/A64/decoder/a64.inc index 368fadcb..0ba1228c 100644 --- a/src/frontend/A64/decoder/a64.inc +++ b/src/frontend/A64/decoder/a64.inc @@ -677,7 +677,7 @@ INST(RBIT_asimd, "RBIT (vector)", "0Q101 // Data Processing - FP and SIMD - SIMD three different INST(SADDL, "SADDL, SADDL2", "0Q001110zz1mmmmm000000nnnnnddddd") INST(SADDW, "SADDW, SADDW2", "0Q001110zz1mmmmm000100nnnnnddddd") -//INST(SSUBL, "SSUBL, SSUBL2", "0Q001110zz1mmmmm001000nnnnnddddd") +INST(SSUBL, "SSUBL, SSUBL2", "0Q001110zz1mmmmm001000nnnnnddddd") INST(SSUBW, "SSUBW, SSUBW2", "0Q001110zz1mmmmm001100nnnnnddddd") //INST(ADDHN, "ADDHN, ADDHN2", "0Q001110zz1mmmmm010000nnnnnddddd") //INST(SABAL, "SABAL, SABAL2", "0Q001110zz1mmmmm010100nnnnnddddd") diff --git a/src/frontend/A64/translate/impl/simd_three_different.cpp b/src/frontend/A64/translate/impl/simd_three_different.cpp index 606a8c36..15d5c29d 100644 --- a/src/frontend/A64/translate/impl/simd_three_different.cpp +++ b/src/frontend/A64/translate/impl/simd_three_different.cpp @@ -56,6 +56,22 @@ bool TranslatorVisitor::SSUBW(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { return true; } +bool TranslatorVisitor::SSUBL(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { + if (size == 0b11) { + return ReservedValue(); + } + + const size_t esize = 8 << size.ZeroExtend(); + const size_t part = Q ? 1 : 0; + + const IR::U128 operand1 = ir.VectorSignExtend(esize, Vpart(64, Vn, part)); + const IR::U128 operand2 = ir.VectorSignExtend(esize, Vpart(64, Vm, part)); + const IR::U128 result = ir.VectorSub(esize * 2, operand1, operand2); + + V(128, Vd, result); + return true; +} + bool TranslatorVisitor::UADDL(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { if (size == 0b11) { return ReservedValue();