diff --git a/src/backend/x64/emit_x64_vector.cpp b/src/backend/x64/emit_x64_vector.cpp index 03d47af0..48618dae 100644 --- a/src/backend/x64/emit_x64_vector.cpp +++ b/src/backend/x64/emit_x64_vector.cpp @@ -3871,6 +3871,60 @@ void EmitX64::EmitVectorSignedSaturatedShiftLeft64(EmitContext& ctx, IR::Inst* i EmitTwoArgumentFallbackWithSaturation(code, ctx, inst, VectorSignedSaturatedShiftLeft); } +template > +static bool VectorSignedSaturatedShiftLeftUnsigned(VectorArray& dst, const VectorArray& data, const VectorArray& shift_values) { + static_assert(std::is_signed_v, "T must be signed."); + + constexpr size_t bit_size_minus_one = Common::BitSize() - 1; + + bool qc_flag = false; + for (size_t i = 0; i < dst.size(); i++) { + const T element = data[i]; + const T shift = std::clamp(static_cast(Common::SignExtend<8>(shift_values[i] & 0xFF)), + -static_cast(bit_size_minus_one), std::numeric_limits::max()); + + if (element == 0) { + dst[i] = 0; + } else if (element < 0) { + dst[i] = 0; + qc_flag = true; + } else if (shift < 0) { + dst[i] = static_cast(element >> -shift); + } else if (static_cast(shift) > bit_size_minus_one) { + dst[i] = static_cast(std::numeric_limits::max()); + qc_flag = true; + } else { + const U shifted = static_cast(element) << static_cast(shift); + const U shifted_test = shifted >> static_cast(shift); + + if (shifted_test != static_cast(element)) { + dst[i] = static_cast(std::numeric_limits::max()); + qc_flag = true; + } else { + dst[i] = shifted; + } + } + } + + return qc_flag; +} + +void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned8(EmitContext& ctx, IR::Inst* inst) { + EmitTwoArgumentFallbackWithSaturation(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned); +} + +void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned16(EmitContext& ctx, IR::Inst* inst) { + EmitTwoArgumentFallbackWithSaturation(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned); +} + +void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned32(EmitContext& ctx, IR::Inst* inst) { + EmitTwoArgumentFallbackWithSaturation(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned); +} + +void EmitX64::EmitVectorSignedSaturatedShiftLeftUnsigned64(EmitContext& ctx, IR::Inst* inst) { + EmitTwoArgumentFallbackWithSaturation(code, ctx, inst, VectorSignedSaturatedShiftLeftUnsigned); +} + void EmitX64::EmitVectorSub8(EmitContext& ctx, IR::Inst* inst) { EmitVectorOperation(code, ctx, inst, &Xbyak::CodeGenerator::psubb); } diff --git a/src/frontend/ir/ir_emitter.cpp b/src/frontend/ir/ir_emitter.cpp index 53b546c0..e774f25d 100644 --- a/src/frontend/ir/ir_emitter.cpp +++ b/src/frontend/ir/ir_emitter.cpp @@ -1661,6 +1661,21 @@ U128 IREmitter::VectorSignedSaturatedShiftLeft(size_t esize, const U128& a, cons return {}; } +U128 IREmitter::VectorSignedSaturatedShiftLeftUnsigned(size_t esize, const U128& a, const U128& b) { + switch (esize) { + case 8: + return Inst(Opcode::VectorSignedSaturatedShiftLeftUnsigned8, a, b); + case 16: + return Inst(Opcode::VectorSignedSaturatedShiftLeftUnsigned16, a, b); + case 32: + return Inst(Opcode::VectorSignedSaturatedShiftLeftUnsigned32, a, b); + case 64: + return Inst(Opcode::VectorSignedSaturatedShiftLeftUnsigned64, a, b); + } + UNREACHABLE(); + return {}; +} + U128 IREmitter::VectorSub(size_t esize, const U128& a, const U128& b) { switch (esize) { case 8: diff --git a/src/frontend/ir/ir_emitter.h b/src/frontend/ir/ir_emitter.h index 291712ee..a77089fe 100644 --- a/src/frontend/ir/ir_emitter.h +++ b/src/frontend/ir/ir_emitter.h @@ -279,6 +279,7 @@ public: U128 VectorSignedSaturatedNarrowToUnsigned(size_t original_esize, const U128& a); U128 VectorSignedSaturatedNeg(size_t esize, const U128& a); U128 VectorSignedSaturatedShiftLeft(size_t esize, const U128& a, const U128& b); + U128 VectorSignedSaturatedShiftLeftUnsigned(size_t esize, const U128& a, const U128& b); U128 VectorSub(size_t esize, const U128& a, const U128& b); Table VectorTable(std::vector values); U128 VectorTableLookup(const U128& defaults, const Table& table, const U128& indices); diff --git a/src/frontend/ir/microinstruction.cpp b/src/frontend/ir/microinstruction.cpp index 46d5fb87..b34b989d 100644 --- a/src/frontend/ir/microinstruction.cpp +++ b/src/frontend/ir/microinstruction.cpp @@ -384,6 +384,10 @@ bool Inst::WritesToFPSRCumulativeSaturationBit() const { case Opcode::VectorSignedSaturatedShiftLeft16: case Opcode::VectorSignedSaturatedShiftLeft32: case Opcode::VectorSignedSaturatedShiftLeft64: + case Opcode::VectorSignedSaturatedShiftLeftUnsigned8: + case Opcode::VectorSignedSaturatedShiftLeftUnsigned16: + case Opcode::VectorSignedSaturatedShiftLeftUnsigned32: + case Opcode::VectorSignedSaturatedShiftLeftUnsigned64: case Opcode::VectorUnsignedSaturatedAccumulateSigned8: case Opcode::VectorUnsignedSaturatedAccumulateSigned16: case Opcode::VectorUnsignedSaturatedAccumulateSigned32: diff --git a/src/frontend/ir/opcodes.inc b/src/frontend/ir/opcodes.inc index b5e8f691..7723b03e 100644 --- a/src/frontend/ir/opcodes.inc +++ b/src/frontend/ir/opcodes.inc @@ -428,6 +428,10 @@ OPCODE(VectorSignedSaturatedShiftLeft8, U128, U128 OPCODE(VectorSignedSaturatedShiftLeft16, U128, U128, U128 ) OPCODE(VectorSignedSaturatedShiftLeft32, U128, U128, U128 ) OPCODE(VectorSignedSaturatedShiftLeft64, U128, U128, U128 ) +OPCODE(VectorSignedSaturatedShiftLeftUnsigned8, U128, U128, U128 ) +OPCODE(VectorSignedSaturatedShiftLeftUnsigned16, U128, U128, U128 ) +OPCODE(VectorSignedSaturatedShiftLeftUnsigned32, U128, U128, U128 ) +OPCODE(VectorSignedSaturatedShiftLeftUnsigned64, U128, U128, U128 ) OPCODE(VectorSub8, U128, U128, U128 ) OPCODE(VectorSub16, U128, U128, U128 ) OPCODE(VectorSub32, U128, U128, U128 )