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emit_x64_vector: AVX512 implementation of EmitVectorLogicalVShiftS64

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MerryMage 2018-09-23 10:41:30 +01:00
parent 3bf183d7e8
commit bd47f2ca8f
1 changed files with 25 additions and 0 deletions
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25
src/backend/x64/emit_x64_vector.cpp
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@ -1408,6 +1408,31 @@ void EmitX64::EmitVectorLogicalVShiftS32(EmitContext& ctx, IR::Inst* inst) {
} }
void EmitX64::EmitVectorLogicalVShiftS64(EmitContext& ctx, IR::Inst* inst) { void EmitX64::EmitVectorLogicalVShiftS64(EmitContext& ctx, IR::Inst* inst) {
if (code.DoesCpuSupport(Xbyak::util::Cpu::tAVX512F) && code.DoesCpuSupport(Xbyak::util::Cpu::tAVX512VL)) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
const Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]);
const Xbyak::Xmm left_shift = ctx.reg_alloc.UseScratchXmm(args[1]);
const Xbyak::Xmm right_shift = ctx.reg_alloc.ScratchXmm();
const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
code.vmovdqa(tmp, code.MConst(xword, 0x00000000000000FF, 0x00000000000000FF));
code.vpxor(right_shift, right_shift, right_shift);
code.vpsubq(right_shift, right_shift, left_shift);
code.vpsllq(xmm0, left_shift, 56);
code.vpand(right_shift, right_shift, tmp);
code.vpand(left_shift, left_shift, tmp);
code.vpsravq(tmp, result, right_shift);
code.vpsllvq(result, result, left_shift);
code.blendvpd(result, tmp);
ctx.reg_alloc.DefineValue(inst, result);
return;
}
EmitTwoArgumentFallback(code, ctx, inst, [](VectorArray<s64>& result, const VectorArray<s64>& a, const VectorArray<s64>& b) { EmitTwoArgumentFallback(code, ctx, inst, [](VectorArray<s64>& result, const VectorArray<s64>& a, const VectorArray<s64>& b) {
std::transform(a.begin(), a.end(), b.begin(), result.begin(), LogicalVShift<s64>); std::transform(a.begin(), a.end(), b.begin(), result.begin(), LogicalVShift<s64>);
}); });