From bdc1b0f590ae75065048920974982e5ab5e01fce Mon Sep 17 00:00:00 2001
From: Liam <byteslice@airmail.cc>
Date: Sun, 13 Nov 2022 15:10:23 -0500
Subject: [PATCH] Implement *MULH

---
 .../arm64/emit_arm64_data_processing.cpp      | 22 ++++++++++++-------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp b/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
index cddb6a39..065070e1 100644
--- a/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
+++ b/src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
@@ -1051,18 +1051,24 @@ void EmitIR<IR::Opcode::Mul64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR
 
 template<>
 void EmitIR<IR::Opcode::SignedMultiplyHigh64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
-    (void)code;
-    (void)ctx;
-    (void)inst;
-    ASSERT_FALSE("Unimplemented");
+    auto args = ctx.reg_alloc.GetArgumentInfo(inst);
+    auto Xresult = ctx.reg_alloc.WriteX(inst);
+    auto Xop1 = ctx.reg_alloc.ReadX(args[0]);
+    auto Xop2 = ctx.reg_alloc.ReadX(args[1]);
+    RegAlloc::Realize(Xresult, Xop1, Xop2);
+
+    code.SMULH(Xresult, Xop1, Xop2);
 }
 
 template<>
 void EmitIR<IR::Opcode::UnsignedMultiplyHigh64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
-    (void)code;
-    (void)ctx;
-    (void)inst;
-    ASSERT_FALSE("Unimplemented");
+    auto args = ctx.reg_alloc.GetArgumentInfo(inst);
+    auto Xresult = ctx.reg_alloc.WriteX(inst);
+    auto Xop1 = ctx.reg_alloc.ReadX(args[0]);
+    auto Xop2 = ctx.reg_alloc.ReadX(args[1]);
+    RegAlloc::Realize(Xresult, Xop1, Xop2);
+
+    code.UMULH(Xresult, Xop1, Xop2);
 }
 
 template<>