diff --git a/src/frontend/A32/decoder/thumb32.h b/src/frontend/A32/decoder/thumb32.h index 8acdbc85..1e877c03 100644 --- a/src/frontend/A32/decoder/thumb32.h +++ b/src/frontend/A32/decoder/thumb32.h @@ -281,7 +281,7 @@ std::optional>> DecodeThumb32(u32 //INST(&V::thumb32_QDSUB, "QDSUB", "111110101000----1111----1011----"), //INST(&V::thumb32_REV, "REV", "111110101001----1111----1000----"), //INST(&V::thumb32_REV16, "REV16", "111110101001----1111----1001----"), - //INST(&V::thumb32_RBIT, "RBIT", "111110101001----1111----1010----"), + INST(&V::thumb32_RBIT, "RBIT", "111110101001nnnn1111dddd1010mmmm"), INST(&V::thumb32_REVSH, "REVSH", "111110101001nnnn1111dddd1011mmmm"), INST(&V::thumb32_SEL, "SEL", "111110101010nnnn1111dddd1000mmmm"), INST(&V::thumb32_CLZ, "CLZ", "111110101011nnnn1111dddd1000mmmm"), diff --git a/src/frontend/A32/translate/impl/thumb32_misc.cpp b/src/frontend/A32/translate/impl/thumb32_misc.cpp index 9f0b228a..e233a33f 100644 --- a/src/frontend/A32/translate/impl/thumb32_misc.cpp +++ b/src/frontend/A32/translate/impl/thumb32_misc.cpp @@ -19,6 +19,31 @@ bool ThumbTranslatorVisitor::thumb32_CLZ(Reg n, Reg d, Reg m) { return true; } +bool ThumbTranslatorVisitor::thumb32_RBIT(Reg n, Reg d, Reg m) { + if (m != n || d == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const IR::U32 swapped = ir.ByteReverseWord(ir.GetRegister(m)); + + // ((x & 0xF0F0F0F0) >> 4) | ((x & 0x0F0F0F0F) << 4) + const IR::U32 first_lsr = ir.LogicalShiftRight(ir.And(swapped, ir.Imm32(0xF0F0F0F0)), ir.Imm8(4)); + const IR::U32 first_lsl = ir.LogicalShiftLeft(ir.And(swapped, ir.Imm32(0x0F0F0F0F)), ir.Imm8(4)); + const IR::U32 corrected = ir.Or(first_lsl, first_lsr); + + // ((x & 0x88888888) >> 3) | ((x & 0x44444444) >> 1) | + // ((x & 0x22222222) << 1) | ((x & 0x11111111) << 3) + const IR::U32 second_lsr = ir.LogicalShiftRight(ir.And(corrected, ir.Imm32(0x88888888)), ir.Imm8(3)); + const IR::U32 third_lsr = ir.LogicalShiftRight(ir.And(corrected, ir.Imm32(0x44444444)), ir.Imm8(1)); + const IR::U32 second_lsl = ir.LogicalShiftLeft(ir.And(corrected, ir.Imm32(0x22222222)), ir.Imm8(1)); + const IR::U32 third_lsl = ir.LogicalShiftLeft(ir.And(corrected, ir.Imm32(0x11111111)), ir.Imm8(3)); + + const IR::U32 result = ir.Or(ir.Or(ir.Or(second_lsr, third_lsr), second_lsl), third_lsl); + + ir.SetRegister(d, result); + return true; +} + bool ThumbTranslatorVisitor::thumb32_REVSH(Reg n, Reg d, Reg m) { if (m != n || d == Reg::PC || m == Reg::PC) { return UnpredictableInstruction(); diff --git a/src/frontend/A32/translate/impl/translate_thumb.h b/src/frontend/A32/translate/impl/translate_thumb.h index 5866bab2..951a7413 100644 --- a/src/frontend/A32/translate/impl/translate_thumb.h +++ b/src/frontend/A32/translate/impl/translate_thumb.h @@ -118,6 +118,7 @@ struct ThumbTranslatorVisitor final { // thumb32 miscellaneous instructions bool thumb32_CLZ(Reg n, Reg d, Reg m); + bool thumb32_RBIT(Reg n, Reg d, Reg m); bool thumb32_REVSH(Reg n, Reg d, Reg m); bool thumb32_SEL(Reg n, Reg d, Reg m); }; diff --git a/tests/A32/fuzz_thumb.cpp b/tests/A32/fuzz_thumb.cpp index f1b9ca0e..abdf5ea4 100644 --- a/tests/A32/fuzz_thumb.cpp +++ b/tests/A32/fuzz_thumb.cpp @@ -369,6 +369,13 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") { const auto n = Common::Bits<16, 19>(inst); return m == n && d != 15 && m != 15; }), + ThumbInstGen("111110101001nnnn1111dddd1010mmmm", // RBIT + [](u32 inst) { + const auto d = Common::Bits<8, 11>(inst); + const auto m = Common::Bits<0, 3>(inst); + const auto n = Common::Bits<16, 19>(inst); + return m == n && d != 15 && m != 15; + }), ThumbInstGen("111110101001nnnn1111dddd1011mmmm", // REVSH [](u32 inst) { const auto d = Common::Bits<8, 11>(inst);